公开(公告)号：KR1020110122523A

公开(公告)日：2011-11-10

申请号：KR1020100042081

申请日：2010-05-04

Applicant: 삼성전자주식회사

Inventor： 박홍범 ,  유대한 ,  이은영 ,  형용우 ,  유영섭 ,  복진권

IPC: H01L21/8247 ,  H01L27/115

CPC classification number: H01L27/11578 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L27/10852 ,  H01L27/11582 ,  H01L28/91 ,  H01L29/66833 ,  H01L29/7926 ,  H01L21/823487

Abstract: PURPOSE: A semiconductor memory device and a manufacturing method thereof are provided to secure the uniformity of a cell current by forming semiconductor patterns with excellent step coating. CONSTITUTION: A buffer insulating film(105) is formed on a semiconductor substrate(100). A thin film structure is formed on the buffer insulating film and consists of a plurality of thin films. The thin film structure is patterned and a penetration area(130) is formed on the thin film structure. A first silicon film(152) is formed to cover the penetration area. A second silicon film(154) is formed on the first silicon film.

Abstract translation: 目的：提供半导体存储器件及其制造方法，以通过形成具有优异的阶梯涂布的半导体图案来确保电池电流的均匀性。 构成：在半导体衬底（100）上形成缓冲绝缘膜（105）。 在缓冲绝缘膜上形成薄膜结构，由多个薄膜构成。 图案化薄膜结构，并且在薄膜结构上形成穿透区域（130）。 形成第一硅膜（152）以覆盖穿透区域。 在第一硅膜上形成第二硅膜（154）。

公开(公告)号：KR1020080019334A

公开(公告)日：2008-03-04

申请号：KR1020060081475

申请日：2006-08-28

Applicant: 삼성전자주식회사

Inventor： 최재형 ,  김영선 ,  정정희 ,  이준영 ,  김중현 ,  강성호 ,  박홍범 ,  서종범

IPC: H01L21/04 ,  H01L21/20 ,  H01L27/108

CPC classification number: H01L21/0228 ,  H01L21/02205 ,  H01L21/324 ,  H01L28/40

Abstract: A method for forming a thin film and a method for manufacturing a capacitor using the same are provided to obtain an excellent dielectric layer by improving surface uniformity on a substrate. A lower electrode(102) is formed on a plurality of substrates(100) which are positioned within a chamber(10). A precursor layer is formed on the lower electrode by supplying precursor gas including hafnium and zirconium onto the substrates. A first purge process is performed to purge the inside of the chamber. A dielectric layer(120) including a zirconium oxide is formed on the lower electrode by oxidizing the precursor layer. A second purge process is performed to purge the inside of the chamber. An upper electrode(130) is formed on the dielectric layer.

Abstract translation: 提供一种形成薄膜的方法和使用其制造电容器的方法，以通过改善基板上的表面均匀性来获得优异的介电层。 在位于室（10）内的多个基板（100）上形成下电极（102）。 通过将含有铪和锆的前体气体供给到基板上，在下电极上形成前体层。 执行第一吹扫处理以吹扫室的内部。 通过氧化前体层，在下部电极上形成包含氧化锆的电介质层（120）。 执行第二吹扫处理以吹扫室的内部。 在电介质层上形成上电极（130）。

公开(公告)号：KR100655691B1

公开(公告)日：2006-12-08

申请号：KR1020050087496

申请日：2005-09-21

Applicant: 삼성전자주식회사

Inventor： 박홍범 ,  이우성 ,  김남규 ,  정정희 ,  최재형

IPC: H01L27/108

Abstract: A capacitor is provided to prevent the size of a silicon germanium particle doped with p-type impurities from increasing by forming a p-type impurity-doped silicon germanium layer after a sheath layer is formed on a first upper electrode. A dielectric layer is formed on a cylindrical lower electrode, having a substantially uniform thickness. An upper electrode is formed on the dielectric layer, composed of a first upper electrode and a second upper electrode formed on the first upper electrode. The first upper electrode includes metal with a substantially uniform thickness. The second upper electrode has a stacked structure in which a silicon layer as a first sheath layer, a silicon germanium layer(134) as a second sheath layer and a p-type impurity-doped silicon germanium layer(136) as a conductive layer are sequentially stacked. The first upper electrode includes titanium nitride.

Abstract translation: 提供电容器以通过在第一上电极上形成护套层之后形成p型杂质掺杂硅锗层来防止掺杂有p型杂质的硅锗颗粒的尺寸增大。 介电层形成在具有基本均匀厚度的圆柱形下电极上。 上电极形成在介电层上，由形成在第一上电极上的第一上电极和第二上电极组成。 第一上电极包括具有基本均匀厚度的金属。 第二上部电极具有堆叠结构，其中作为第一护套层的硅层，作为第二护套层的硅锗层（134）和作为导电层的p型杂质掺杂硅锗层（136）是 顺序堆叠。 第一上电极包括氮化钛。