公开(公告)号：KR1020130073183A

公开(公告)日：2013-07-03

申请号：KR1020110140896

申请日：2011-12-23

Applicant: 한국과학기술원

Inventor： 유승협 ,  문한얼

IPC: H01L51/05 ,  H01L29/786

CPC classification number: H01L51/0529 ,  H01L51/0021 ,  H01L51/0545 ,  H01L51/105

Abstract: PURPOSE: An organic thin film transistor and a manufacturing method thereof are provided to improve stability by using an upper dielectric layer having hydrophobicity formed in a channel region. CONSTITUTION: A base gate dielectric layer (200) is formed on a gate. A hydrophobic layer (300) is formed between a source and a drain. An organic semiconductor layer (500) is formed in the source and the drain. The organic semiconductor layer is formed on the hydrophobic layer. The hydrophobic layer is made of cytop.

Abstract translation: 目的：提供有机薄膜晶体管及其制造方法，以通过使用在沟道区域中形成疏水性的上介电层来提高稳定性。 构成：在栅极上形成基极电介质层（200）。 在源极和漏极之间形成疏水层（300）。 在源极和漏极中形成有机半导体层（500）。 在疏水层上形成有机半导体层。 疏水层由cytop制成。

公开(公告)号：KR102041048B1

公开(公告)日：2019-11-06

申请号：KR1020180055825

申请日：2018-05-16

Applicant: 한국과학기술원

Inventor： 유승협 ,  문한얼 ,  윤정후

IPC: H01L27/1157 ,  H01L27/11573 ,  H01L27/11502

公开(公告)号：KR1020140035986A

公开(公告)日：2014-03-24

申请号：KR1020140021154

申请日：2014-02-24

Applicant: 한국과학기술원

Inventor： 임성갑 ,  유승협 ,  성혜정 ,  문한얼 ,  김민철

IPC: H01L51/40

CPC classification number: H01L51/052 ,  H01L21/02118 ,  H01L21/02271

Abstract: The present invention relates to a method for forming a dielectric layer using iCVD process. According to the present invention, the method for forming a dielectric layer on an organic thin film transistor using iCVD process comprises the steps of: thermally decomposing an initiator by the heat injected on the organic thin film transistor to form free radicals; activating monomers by using the free radicals to chain polymerize the monomers to form a polymer; and depositing the polymer on the organic thin film transistor to form a polymer dielectric layer. According to the present invention, it is possible to solve a shortcoming of a narrow width of a dielectric layer prepared by PECVD or CVD process through iCVD, and conduct uniform deposition compared with a conventional process, and a very low leakage current is shown in various thickness, thereby obtaining the remarkable electrical properties of a device and improving the manufacturing yield of the device, through a high dielectric constant. In addition, it is possible to prevent damage to a deposition medium due to a solvent since a desired polymer dielectric layer can be deposited with monomers and an initiator in a vapor phase condition without a solvent, particularly, an organic solvent. [Reference numerals] (S200) Supply monomers and an initiator; (S210) Inject heat; (S220) Form free radicals; (S230) Form a polymer; (S240) Form a polymeric dielectric layer

Abstract translation: 本发明涉及使用iCVD工艺形成介电层的方法。 根据本发明，使用iCVD工艺在有机薄膜晶体管上形成电介质层的方法包括以下步骤：通过注入到有机薄膜晶体管上的热量来热分解引发剂以形成自由基; 通过使用自由基来活化单体以使单体链聚合以形成聚合物; 以及将所述聚合物沉积在所述有机薄膜晶体管上以形成聚合物介电层。 根据本发明，可以通过iCVD解决通过PECVD或CVD工艺制备的电介质层的窄宽度的缺点，并且与常规工艺相比进行均匀沉积，并且以各种方式示出非常低的漏电流 从而通过高介电常数获得器件的显着电性能并提高器件的制造成品率。 此外，可以防止由于溶剂而导致的沉积介质的损坏，因为可以在不使用溶剂，特别是有机溶剂的气相条件下，用单体和引发剂沉积所需的聚合物电介质层。 （参考号）（S200）供给单体和引发剂; （S210）注入热量; （S220）形成自由基; （S230）形成聚合物; （S240）形成聚合物介电层

公开(公告)号：KR1020130073184A

公开(公告)日：2013-07-03

申请号：KR1020110140897

申请日：2011-12-23

Applicant: 한국과학기술원

Inventor： 유승협 ,  문한얼

IPC: H01L29/786 ,  H01L51/50

CPC classification number: H05B33/06 ,  H01L51/5203 ,  H05B33/26

Abstract: PURPOSE: A thin film electric device including a self-aligned multi layer is provided to increase electric conductivity by forming a hydrophobic pattern at one time. CONSTITUTION: A hydrophobic pattern (200) is formed on a substrate. A first thin film (300) is formed in the hydrophilic surface of the substrate. A second thin film (400) is formed on the first thin film by using a selective wetting phenomenon. A plasma etching or a printing process is performed to form the hydrophobic pattern.

Abstract translation: 目的：提供包括自对准多层的薄膜电气装置，以通过一次形成疏水图案来提高导电性。 构成：在衬底上形成疏水性图案（200）。 在基板的亲水表面上形成第一薄膜（300）。 通过使用选择性润湿现象，在第一薄膜上形成第二薄膜（400）。 执行等离子体蚀刻或印刷工艺以形成疏水图案。

公开(公告)号：KR101087702B1

公开(公告)日：2011-11-30

申请号：KR1020100016768

申请日：2010-02-24

Applicant: 한국과학기술원

Inventor： 유승협 ,  임동모 ,  문한얼

IPC: H01L51/54

Abstract: 본 발명은 유기 다이오드에 관한 것이다. 보다 상세하게는 전하이동도가 높은 n형 유기 반도체와 p형 금속 산화물 반도체를 이용하여 저전압에서 동작 가능하며 높은 순방향 전류와 낮은 역방향 전류 특성을 갖도록 한 유기 다이오드에 관한 것이다. 본 발명은 기판 상부에 형성되며 풀러린(Fullerene)을 포함하는 전자 수송층, 상기 기판과 상기 전자 수송층 사이에 형성되며 상기 전자 수송층과 정류 접합이 이루어지는 제1 전극층, 및 상기 전자 수송층 상부에 형성되며 상기 전자 수송층과 오믹(Ohmic) 접합이 이루어지는 제2 전극층을 포함하는 것을 특징으로 한다. 본 발명에 의하면 전하의 이동 방향이 기판에 대하여 수직 방향인 MIM 구조를 가지면서도 종래의 유기 다이오드와 비교시에 높은 순방향 전류와 매우 낮은 역방향 전류를 갖는 것이 가능한 효과를 갖는다.