Abstract:
PURPOSE: An inkjet printer head and method for manufacturing the same is provided to achieve improved productivity and reduce manufacturing cost by arranging a plurality of inkjet nozzles through a single metal plating process. CONSTITUTION: A method comprises a first step of preparing a substrate(201) having an embedded resistor(206) for heating an ink and a bottom metal layer(310) deposited onto the substrate; a second step of spin coating or film coating the photoresistor or polyimide onto the bottom metal layer through a photolithography process, and forming first and second photoresist molds; a third step of forming a preliminary metal barrier layer formed of a Ni-plating layer onto the bottom metal layer, such that the preliminary metal barrier layer has a height corresponding to the height of first and second photoresist molds, and forming a main metal barrier layer(508) in such a manner that the top of the first photoresist mold is completely covered by the Ni-plating layer and the top of the second photoresist mold is not completely covered by the overplating Ni-plating layer, so as to form an inkjet nozzle(207) having a predetermined size and shape; a fourth step of partially etching the first photoresist mold, second photoresist mold and the bottom metal layer, so as to form an ink flow channel(203) within the main metal barrier layer; and a fifth step of partially etching the substrate so as to form a main ink supply path(202) communicated to the ink flow channel.
Abstract:
PURPOSE: A semiconductor device of which area occupied on a substrate is small and of which passive electric device having little serial resistance and large current limit is integrated with a monolithic method is provided. CONSTITUTION: The inductor(1) is composed of three parts which are formed by a single metal plating at the same time; a signal pillar(102) functioned as a path electrically connected with an integrated circuit(100) of a substrate(101); a supporting bar(103) supporting a spiral inductor(104) with a specific number to promote the mechanical stability while manufacturing and using; and the spiral inductor(104) minimizing the electromagnetic influence which can affect the integrated circuit(100) of the lower area and minimizing the signal loss to the substrate(101).
Abstract:
본 발명은 자외선램프가 장착된 유도결합 플라즈마 구리식각장치에 관한 것이다. 좀 더 구체적으로, 본 발명은 낮은 온도에서의 구리의 식각율을 높일 수 있으며 대면적의 웨이퍼에도 효과적으로 사용할 수 있도록 유도결합 플라즈마 장치에 자외선 방사수단을 장착한 구리식각장치 및 전기 장치를 이용하여 구리를 식각하는 방법에 관한 것이다. 본 발명의 구리식각장치는 공정쳄버 내에 유전체창, 안테나 및 라디오파 차단모가 형성되고 할로겐가스와 구리의 반응생성물을 탈착하여 웨이퍼의 구리를 식각하는 유도결합 플라즈마 구리식각장치에 있어서, 웨이퍼에 자외선을 방사하기 위한 자외선램프 ; 전기한 유전체창을 자외선투과가 가능하도록 구성한 투사유전체창 ; 전기한 유전체창을 자외선투과가 가능하도록 구성한 투사유전체창 ; 및, 전기한 자외선램프에서 방사된 빛의 최대량을 웨이퍼에 입사시키기 위한 평행광용 자외선거울로 구성된 자외선 방사수단이 장착된 것을 특징으로 하며, 본 발명의 구리식각방법은 할로겐가스와 구리의 반응생성물을 탈착하여 웨이퍼의 구리를 식각하는 유도결합 플라즈마에 의한 구리식각시, 전기 구리식각장치의 자외선 방사수단에 의해 자외선을 입사하여 반응생성물의 탈착에 필요한 에너지를 인가하는 과정을 포함한다.
Abstract:
본 발명은 다결정 실리콘 박막을 이용한 EEPROM 및 플래시 메모리와 그 제조방법에 관한 것으로서, 상세하게는 다결정 실리콘 박막을 이용한 EEPROM 및 플래시 메모리를 싼 가격에 고밀도로 제조하기 위하여 다결정 실리콘 위에 형성된 산화막의 누설전류, 절연파괴전압 및 QBD(charge to breakdowm) 특성이 단결정 실리콘 위에 형성된 열산화막과 유사한 산화막을 게이트 산화막으로 이용하는 것이다. 이를 위해 본 발명에서는 게이트 산화막을 ICP(Inductively Coupled Plasma), ECR (Electron Cyclotron Resonance) 및 Helicon 등의 전극을 사용하는 고밀도 플라즈마 발생장치를 이용하여 산소 분위기 또는 NO 가스 및 N 2 O가스와 같은 질소원자를 포함한 가스 분위기에서 N 2 O 플라즈마 산화막으로 형성한다. 또한 플로팅 게이트와 컨트롤 게이트 사이의 절연체 역시 플라즈마 산화법에 의해 산화막을 형성함으로써 메모리 셀의 신뢰성을 향상을 꾀한 것이다. 이로써, 다결정 실리콘 박막을 이용한 EEPROM 및 플래시 메모리를 싼 가격에 고밀도로 제조할 수 있다.
Abstract:
PURPOSE: A method for fabricating a micro-sized driving device is provided to drive the micro-sized driving device with low operating voltage by allowing electrodes having a comb shape to have fine interval. CONSTITUTION: A substrate is firstly prepared. Then, a first oxide layer, a first silicon layer, a second oxide layer, a nitride layer and a third oxide layer are sequentially deposited on the substrate. A first electrode pattern is formed on the third oxide layer by using a photosensitive film. The third oxide layer, the nitride layer, the second oxide layer and the first silicon layer are etched along the first electrode pattern in order to expose the first oxide layer, thereby obtaining a first electrode having a plurality of fingers. An oxide layer is formed at a lateral portion of the first electrode. Then, a second electrode is formed by etching a fourth oxide layer and a second silicon layer formed on the second silicon layer. After that, the first oxide layer, the second oxide layer, the lateral oxide layer, the fourth oxide layer and the nitride layer are removed, thereby achieving a micro-sized driving device.
Abstract:
A method of fabricating a refractive silicon microlens by using micro-machining technology. The method of fabricating a refractive silicon microlens according to the present invention comprises the steps of forming a boron-doped region on a silicon substrate, and selectively removing regions of the substrate except for the boron-doped region to form a lens comprised of only the boron-doped region. With the method of the present invention, it is possible to fabricate a two-dimensional infrared silicon microlens array. By using such a two-dimensional infrared silicon microlens array in an infrared sensor, the detectivity of the infrared sensor can be increased by 3.4 times, which is the refraction index of silicon. In addition, the two-dimensional infrared silicon microlens array of the present invention can be used with commercial infrared telecommunication devices.
Abstract:
Disclosed are a three dimensional metal device floated over a semiconductor substrate, a circuit thereof, and a manufacturing method thereof. A passive electric device for wireless communications and optical communications, such as a spiral inductor, a solenoid inductor, a spiral transformer, a solenoid transformer, a micro mirror, a transmission line is floated over and apart by a few ten micrometers from the semiconductor substrate. These three dimensional metal devices remarkably decrease a signal loss to the substrate, to thereby enhance the device performance, to allow a modeling of a device separated from the substrate, and to make it possible to form an integrated circuit below the device. Further, the three dimensional metal device is manufactured in a monolithic method on the integrated circuit such that it does not affect on the integrated circuit formed therebelow.
Abstract:
PURPOSE: A method for fabricating a micro lens is provided, which has a cross section in a shape of a hyperhemisphere. CONSTITUTION: According to the method, a sacrificial layer(20a) is formed on a silicon or glass substrate(10), and an epilayer pattern whose cross section is deformed into a sphere shape by a surface tension according to the heating is formed on the above sacrificial layer. And the sacrificial layer is laterally etched using the epilayer pattern. And the epilayer pattern is reflowed by heating the epilayer pattern. And at least a part of the cross section of the micro lens is in a hyperhemisphere shape.
Abstract:
PURPOSE: A method for forming a fine interval using chemical mechanical polishing and a method for manufacturing a lateral FEA(field emission array) are provided to obtain an FEA having low voltage and high current driving characteristic and uniform field emission characteristic. CONSTITUTION: A lateral FEA is manufactured by sequentially forming a first silicon oxide film and a first silicon film on a substrate(210), injecting dopant to the first silicon film, forming a mesa type photosensitive pattern on the first silicon film, forming a first probe layer by etching the first silicon film to expose the first silicon oxide film, forming a second silicon oxide film on the first probe layer, forming a silicon film over the second silicon layer, injecting dopant to the second silicon layer, forming a second probe layer by chemically mechanically polishing the second silicon film to expose the second silicon oxide film, selectively removing the second silicon oxide layer to form a fine interval(A') between the first and the second probe layers(230a,250a), removing the first silicon oxide film under the side bottom of the first probe layer to form a first silicon oxide film pattern(220a), and forming metal wires(260) on the first and the second probe layers(230a,250a), respectively.
Abstract:
PURPOSE: A nonvolatile static memory device is provided to improve an operating speed of a device by adding a nonvolatile characteristic to a static memory device. CONSTITUTION: A nonvolatile static memory device is formed by adding a nonvolatile characteristic to a static memory device comprising a drive element(16), a load element(17), and an access element(19). A boron implanted layer is formed on both sides of a silicon substrate. A floating gate and a control gate are formed on the silicon substrate. A tunneling oxide layer is formed at a lower portion of the floating gate. The nonvolatile characteristic is added to the static memory device by using a difference of threshold voltages according to a charge stored in the floating gate.