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    판독수정기록(Read Modify Write, RMW)사이클 지원을 위한 잠금 처리회로
    15.
    发明授权
    판독수정기록(Read Modify Write, RMW)사이클 지원을 위한 잠금 처리회로 失效
    锁定处理电路用于读取修改写入（RMW）周期支持

    公开(公告)号：KR1019930007016B1

    公开(公告)日：1993-07-26

    申请号：KR1019900021858

    申请日：1990-12-26

    Applicant: 한국전자통신연구원

    Inventor： 박병관 ,  강경용 ,  심원세 ,  기안도 ,  윤용호 ,  천유식

    IPC: G06F15/16

    Abstract: The circuit supports read modify write cycle which is for the synchronization of processors in a multiprocessor system without occupation of bus. It includes buffers (B1-B8) for buffering various signals from processors, a buffer control logic (5) for controlling the buffers (B1-B8) according to data strobe, RMW cycle (RMC) and read/write (rd/wr) signals, an interlock control logic (6) for generating various interlock signals, a comparator (8) for generating lock-same signal, and a flag (9) for applying lock set signal to the comparator (8).

    Abstract translation: 该电路支持读修改写周期，其用于在不占用总线的多处理器系统中的处理器的同步。 它包括用于缓冲来自处理器的各种信号的缓冲器（B1-B8），用于根据数据选通，RMW周期（RMC）和读/写（rd / wr）控制缓冲器（B1-B8）的缓冲器控制逻辑（5） 信号，用于产生各种互锁信号的互锁控制逻辑（6），用于产生锁定相同信号的比较器（8）和用于将锁定设置信号施加到比较器（8）的标志（9）。

    다중처리기 시스템에서의 인터럽트 전송 방법
    16.
    发明授权
    다중처리기 시스템에서의 인터럽트 전송 방법 失效
    如何在多处理器系统中发送中断

    公开(公告)号：KR1019920010581B1

    公开(公告)日：1992-12-07

    申请号：KR1019890019310

    申请日：1989-12-22

    Applicant: 한국전자통신연구원

    Inventor： 박병관 ,  강경용 ,  심원세 ,  기안도 ,  윤남석 ,  윤용호 ,  오길록 ,  서대화

    IPC: G06F13/24

    Abstract: The method sends interrupt signals using time multiplexing method to perform multi-function of multi-processor system. The method comprises the steps: (A) selecting interrupt signal according to the state register output and sending contents of register file (9) to an interrupt processor when arbitrary win signal is received; (B) informing kind of interrupt vector from an interrupt requester to a register file and sending contents of a register file to an interrupt requestor; (C) sending interrupt vector to an interrupt processor; and (D) sending response signal from an interrupt processor to an interrupt processor. Each step is executed during bus synchronous signal pulse duration to send interrupt signal.

    Abstract translation: 该方法使用时间复用方法发送中断信号，执行多处理器系统的多功能。 该方法包括以下步骤：（A）当接收到任意win信号时，根据状态寄存器输出选择中断信号并将寄存器文件（9）的内容发送到中断处理器; （B）将中断请求者的中断向量通知给寄存器文件，并将寄存器文件的内容发送给中断请求者; （C）向中断处理器发送中断向量; 和（D）将响应信号从中断处理器发送到中断处理器。 总线同步信号脉冲持续时间执行每个步骤发送中断信号。

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