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公开(公告)号:US12283479B2
公开(公告)日:2025-04-22
申请号:US17847531
申请日:2022-06-23
Applicant: ASM IP Holding B.V.
Inventor: JaeOk Ko , HeeSung Kang , JaeBin Ahn , SeokJae Oh , WanGyu Lim , HyounMo Choi , YoungJae Kim , Shinya Ueda
IPC: H01L21/02 , C23C16/02 , C23C16/04 , C23C16/34 , C23C16/455 , C23C16/505 , H01J37/32 , H01L21/311 , H01L21/768
Abstract: Provided is a substrate processing method capable of filling a film in a gap structure without forming voids or seams in a gap, the substrate processing method including: a first step of forming a thin film on a structure including a gap by performing a first cycle including supplying a first reaction gas and supplying a second reaction gas to the structure a plurality of times; a second step of etching a portion of the thin film by supplying a fluorine-containing gas onto the thin film; a third step of supplying a hydrogen-containing gas onto the thin film; a fourth step of supplying an inhibiting gas to an upper portion of the gap; and a fifth step of forming a thin film by performing a second cycle including supplying the first reaction gas and supplying a second reaction gas onto the thin film a plurality of times.
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公开(公告)号:US11676812B2
公开(公告)日:2023-06-13
申请号:US16904166
申请日:2020-06-17
Applicant: ASM IP Holding B.V.
Inventor: Dai Ishikawa , Atsuki Fukazawa , Eiichiro Shiba , Shinya Ueda , Taishi Ebisudani , SeungJu Chun , YongMin Yoo , YoonKi Min , SeYong Kim , JongWan Choi
IPC: H01L21/311 , H01L21/02
CPC classification number: H01L21/0217 , H01L21/0228 , H01L21/0234 , H01L21/02211 , H01L21/02274 , H01L21/31111 , H01J2237/3347
Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.
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公开(公告)号:US20230142899A1
公开(公告)日:2023-05-11
申请号:US17979237
申请日:2022-11-02
Applicant: ASM IP Holding B.V.
Inventor: Shinya Ueda , SeokJae Oh , HyunGyu Jang , HeeSung Kang , WanGyu Lim , HyounMo Choi , YoungJae Kim
IPC: C23C16/505 , H01J37/32 , C23C16/34 , C23C16/52 , C23C16/455
CPC classification number: C23C16/505 , H01J37/32743 , H01J37/32449 , C23C16/345 , C23C16/52 , C23C16/45536 , H01J2237/3321
Abstract: A method and system for forming a film on a substrate are disclosed. Exemplary methods include using a first plasma condition to form a layer of deposited material having a good film thickness uniformity, using a second plasma condition to treat the deposited material and thereby form treated material, and using a third plasma condition to form a surface-modified layer—e.g., reactive sites on the treated material.
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公开(公告)号:US20220415650A1
公开(公告)日:2022-12-29
申请号:US17847531
申请日:2022-06-23
Applicant: ASM IP Holding B.V.
Inventor: JaeOk Ko , HeeSung Kang , JaeBin Ahn , SeokJae Oh , WanGyu Lim , HyounMo Choi , YoungJae Kim , Shinya Ueda
IPC: H01L21/02 , C23C16/455 , H01J37/32 , C23C16/02 , C23C16/505 , C23C16/04
Abstract: Provided is a substrate processing method capable of filling a film in a gap structure without forming voids or seams in a gap, the substrate processing method including: a first step of forming a thin film on a structure including a gap by performing a first cycle including supplying a first reaction gas and supplying a second reaction gas to the structure a plurality of times; a second step of etching a portion of the thin film by supplying a fluorine-containing gas onto the thin film; a third step of supplying a hydrogen-containing gas onto the thin film; a fourth step of supplying an inhibiting gas to an upper portion of the gap; and a fifth step of forming a thin film by performing a second cycle including supplying the first reaction gas and supplying a second reaction gas onto the thin film a plurality of times.
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公开(公告)号:US20190057857A1
公开(公告)日:2019-02-21
申请号:US16167225
申请日:2018-10-22
Applicant: ASM IP Holding B.V.
Inventor: Dai Ishikawa , Atsuki Fukazawa , Eiichiro Shiba , Shinya Ueda , Taishi Ebisudani , SeungJu Chun , YongMin Yoo , YoonKi Min , SeYong Kim , JongWan Choi
IPC: H01L21/02 , H01L21/311
Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.
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公开(公告)号:US20230323558A1
公开(公告)日:2023-10-12
申请号:US18123508
申请日:2023-03-20
Applicant: ASM IP Holding B.V.
Inventor: SungHoon Jun , ByeongPil Park , Shinya Ueda
CPC classification number: C25D11/18 , C23C16/463 , H01J37/32724
Abstract: A method of manufacturing a cooling device of a substrate processing apparatus includes: providing an aluminum plate having a through hole; forming a temperature control portion by anodizing the aluminum plate; and arranging the temperature control portion below a substrate support portion, wherein the temperature control portion is arranged so that a support rod of the substrate support portion passes through the through hole.
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公开(公告)号:US20200321209A1
公开(公告)日:2020-10-08
申请号:US16904166
申请日:2020-06-17
Applicant: ASM IP Holding B.V.
Inventor: Dai Ishikawa , Atsuki Fukazawa , Eiichiro Shiba , Shinya Ueda , Taishi Ebisudani , SeungJu Chun , YongMin Yoo , YoonKi Min , SeYong Kim , JongWan Choi
IPC: H01L21/02 , H01L21/311
Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.
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