公开(公告)号：US20150179440A1

公开(公告)日：2015-06-25

申请号：US14461995

申请日：2014-08-18

Applicant: ASM IP Holding B.V.

Inventor： Jerry Chen ,  Vladimir Machkaoutsan ,  Brennan Milligan ,  Jan Maes ,  Suvi Haukka ,  Eric Shero ,  Tom Blomberg ,  Dong Li

IPC: H01L21/02

CPC classification number: H01L21/28088 ,  H01L21/02186 ,  H01L21/0228 ,  H01L21/02321 ,  H01L21/02337 ,  H01L21/28044 ,  H01L21/2807 ,  H01L21/28556 ,  H01L21/28568

Abstract: Methods of treating metal-containing thin films, such as films comprising titanium carbide, with a silane/borane agent are provided. In some embodiments a film comprising titanium carbide is deposited on a substrate by an atomic layer deposition (ALD) process. The process may include a plurality of deposition cycles involving alternating and sequential pulses of a first source chemical that comprises titanium and at least one halide ligand, a second source chemical comprising metal and carbon, wherein the metal and the carbon from the second source chemical are incorporated into the thin film, and a third source chemical, wherein the third source chemical is a silane or borane that at least partially reduces oxidized portions of the titanium carbide layer formed by the first and second source chemicals. In some embodiments treatment forms a capping layer on the metal carbide film.

Abstract translation: 提供了用含有碳化钛的薄膜与含硅烷/硼烷剂一起处理含金属薄膜的方法。 在一些实施方案中，包含碳化钛的膜通过原子层沉积（ALD）工艺沉积在衬底上。 该方法可以包括多个沉积循环，其涉及包含钛和至少一种卤化物配体的第一源化学品的交替和顺序脉冲，包含金属和碳的第二源化学物质，其中来自第二源化学物质的金属和碳 和第三源化学品，其中第三源化学品是至少部分地减少由第一和第二源化学品形成的碳化钛层的氧化部分的硅烷或硼烷。 在一些实施方案中，处理在金属碳化物膜上形成覆盖层。

公开(公告)号：US20150021540A1

公开(公告)日：2015-01-22

申请号：US14334566

申请日：2014-07-17

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Jan Willem Maes ,  Tom Blomberg ,  Marko Tuominen ,  Suvi Haukka ,  Robin Roelofs ,  Jacob Woodruff

IPC: H01L45/00

CPC classification number: H01L45/146 ,  H01L21/02175 ,  H01L21/0228 ,  H01L39/249 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/14 ,  H01L45/1616 ,  H01L45/1641

Abstract: The disclosed technology generally relates to the field of semiconductor processing and more particularly to resistive random access memory and methods for manufacturing such memory. In one aspect, a method of fabricating a memory cell includes providing a substrate and providing a first electrode on the substrate. The method additionally includes depositing, via atomic layer deposition, a resistive switching material on the first electrode, wherein the resistive switching material comprises an oxide comprising a pnictogen chosen from the group consisting of As, Bi, Sb, and P. The resistive switching material may be doped, e.g., with Sb or an antimony-metal alloy. A second electrode may be formed over and in contact with the resistive switching material.

Abstract translation: 所公开的技术通常涉及半导体处理领域，更具体地涉及电阻随机存取存储器以及用于制造这种存储器的方法。 一方面，一种制造存储单元的方法包括提供衬底并在衬底上提供第一电极。 该方法还包括通过原子层沉积沉积第一电极上的电阻式开关材料，其中电阻开关材料包括一种氧化物，该氧化物包括选自由As，Bi，Sb和P组成的组的pnictogen。电阻式开关材料 可以掺杂，例如用Sb或锑 - 金属合金。 第二电极可以形成在电阻开关材料之上并与电阻开关材料接触。

公开(公告)号：US08912101B2

公开(公告)日：2014-12-16

申请号：US13799708

申请日：2013-03-13

Applicant: ASM IP Holding B.V.

Inventor： Naoto Tsuji ,  Atsuki Fukazawa ,  Noboru Takamure ,  Suvi Haukka ,  Antti Juhani Niskanen ,  Hyung Sang Park

IPC: H01L21/31 ,  H01L21/469 ,  H01L21/02 ,  C23C16/32 ,  C23C16/34 ,  C23C16/455 ,  H01L21/768

CPC classification number: H01L21/0228 ,  C23C16/325 ,  C23C16/345 ,  C23C16/45534 ,  C23C16/4554 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/76829

Abstract: A method for forming a silicon-containing dielectric film on a substrate by atomic layer deposition (ALD) includes: providing two precursors, one precursor containing a halogen in its molecule, another precursor containing a silicon but no halogen in its molecule, adsorbing a first precursor, which is one of the two precursors onto a substrate to deposit a monolayer of the first precursor; adsorbing a second precursor, which is the other of the two precursors onto the monolayer of the first precursor to deposit a monolayer of the second precursor; and exposing the monolayer of the second precursor to radicals of a reactant to cause surface reaction with the radicals to form a compound monolayer of a silicon-containing film.

Abstract translation: 通过原子层沉积（ALD）在衬底上形成含硅电介质膜的方法包括：提供两个前体，在其分子中含有卤素的一种前体，在其分子中含有硅但不含卤素的另一种前体，吸附第一 前体，其是沉积单层第一前体的底物上的两种前体之一; 将作为所述两种前体中的另一种的第二前体吸附到所述第一前体的单层上以沉积所述第二前体的单层; 并将第二前体的单层暴露于反应物的自由基以引起与自由基的表面反应以形成含硅膜的化合物单层。

公开(公告)号：US20240026548A1

公开(公告)日：2024-01-25

申请号：US18349444

申请日：2023-07-10

Applicant: ASM IP HOLDING B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01L21/311 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32 ,  H01L21/3065

CPC classification number: C23F4/02 ,  C23F1/12 ,  H01L21/32135 ,  C09K13/00 ,  H01L21/31122 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32009 ,  H01J37/3244 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：US11739428B2

公开(公告)日：2023-08-29

申请号：US17646389

申请日：2021-12-29

Applicant: ASM IP HOLDING B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01L21/311 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32 ,  H01L21/3065

CPC classification number: C23F4/02 ,  C09K13/00 ,  C09K13/08 ,  C09K13/10 ,  C23F1/12 ,  H01J37/32009 ,  H01J37/3244 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/32135 ,  H01L21/31138

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：US11728164B2

公开(公告)日：2023-08-15

申请号：US17450538

申请日：2021-10-11

Applicant: ASM IP HOLDING B.V.

Inventor： Eva Tois ,  Viljami Pore ,  Suvi Haukka ,  Toshiya Suzuki ,  Lingyun Jia ,  Sun Ja Kim ,  Oreste Madia

IPC: C23C16/40 ,  C23C16/455 ,  H01L21/02

CPC classification number: H01L21/02274 ,  C23C16/401 ,  C23C16/45542 ,  C23C16/45553 ,  H01L21/0228 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02186 ,  H01L21/02216

Abstract: Methods for selectively depositing oxide thin films on a dielectric surface of a substrate relative to a metal surface are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a first precursor comprising oxygen and a species to be included in the oxide, such as a metal or silicon, and a second plasma reactant. In some embodiments the second plasma reactant comprises a plasma formed in a reactant gas that does not comprise oxygen. In some embodiments the second plasma reactant comprises plasma generated in a gas comprising hydrogen.

公开(公告)号：US11170993B2

公开(公告)日：2021-11-09

申请号：US16605475

申请日：2018-05-03

Applicant: ASM IP Holding B.V.

Inventor： Eva Tois ,  Viljami Pore ,  Suvi Haukka ,  Toshiya Suzuki ,  Lingyun Jia ,  Sun Ja Kim ,  Oreste Madia

IPC: C23C16/40 ,  H01L21/02 ,  C23C16/455

Abstract: Methods for selectively depositing oxide thin films on a dielectric surface of a substrate relative to a metal surface are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a first precursor comprising oxygen and a species to be included in the oxide, such as a metal or silicon, and a second plasma reactant. In some embodiments the second plasma reactant comprises a plasma formed in a reactant gas that does not comprise oxygen. In some embodiments the second plasma reactant comprises plasma generated in a gas comprising hydrogen.

公开(公告)号：US11139383B2

公开(公告)日：2021-10-05

申请号：US16849144

申请日：2020-04-15

Applicant: ASM IP Holding B.V.

Inventor： Suvi Haukka ,  Michael Givens ,  Eric Shero ,  Jerry Winkler ,  Petri Räisänen ,  Timo Asikainen ,  Chiyu Zhu ,  Jaakko Anttila

IPC: H01L29/49 ,  H01L21/285 ,  H01L21/3205 ,  C23C16/06 ,  C23C16/34 ,  C23C16/455 ,  H01L29/51

Abstract: A process for depositing titanium aluminum or tantalum aluminum thin films comprising nitrogen on a substrate in a reaction space can include at least one deposition cycle. The deposition cycle can include alternately and sequentially contacting the substrate with a vapor phase Ti or Ta precursor and a vapor phase Al precursor. At least one of the vapor phase Ti or Ta precursor and the vapor phase Al precursor may contact the substrate in the presence of a vapor phase nitrogen precursor.

公开(公告)号：US20200308710A1

公开(公告)日：2020-10-01

申请号：US16881885

申请日：2020-05-22

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01L21/311 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32 ,  H01L21/3065

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：US10662534B2

公开(公告)日：2020-05-26

申请号：US16390540

申请日：2019-04-22

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: C23F4/02 ,  C23F1/12 ,  H01L21/3213 ,  C09K13/00 ,  H01L21/311 ,  C09K13/08 ,  C09K13/10 ,  H01J37/32 ,  H01L21/3065

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.