公开(公告)号：GB2525523A

公开(公告)日：2015-10-28

申请号：GB201513325

申请日：2012-09-14

Applicant: IBM

Inventor： BLAINEY ROBERT JAMES ,  GSCHWIND MICHAEL KARL ,  MCINNES JAMES LAWRENCE ,  MUNROE STEVEN JAY

IPC: G06F9/45

Abstract: Compiling code for an enhanced application binary interface (ABI) including identifying 602 a code sequence configured to perform a variable address reference table, such as a table of contents (TOC) function including an access to a variable at an offset outside of a location in a variable address reference table. The code sequence includes an internal representation (IR) of an instruction that will be expanded to multiple instructions that are adjacent to each other in the object file and corresponds to a reduced latency of IOP sequence when executed on a decode time instruction optimization (DTIO) enabled microprocessor. A modified scheduler cost function which is configured to recognize that the internal representation corresponds to the reduced latency is used. An object file is generated 606 responsive to the modified scheduler cost function to include expanding the internal representation (IR) as multiple adjacent instructions. The object file is emitted 608 for linking by a linker.

公开(公告)号：GB2509653A

公开(公告)日：2014-07-09

申请号：GB201406775

申请日：2012-10-01

Applicant: IBM

Inventor： BLAINEY ROBERT JAMES ,  GSCHWIND MICHAEL KARL ,  MCINNES JAMES LAWRENCE ,  MUNROE STEVEN JAY ,  MEISSNER MICHAEL

IPC: G06F9/45

Abstract: A code sequence made up multiple instructions and specifying an offset from a base address is identified in an object file. The offset from the base address corresponds to an offset location in a memory configured for storing an address of a variable or data. The identified code sequence is configured to perform a memory reference function or a memory address computation function. It is determined that the offset location is within a specified distance of the base address and that a replacement of the identified code sequence with a replacement code sequence will not alter program semantics. The identified code sequence in the object file is replaced with the replacement code sequence that includes a no-operation (NOP) instruction or having fewer instructions than the identified code sequence. Linked executable code is generated based on the object file and the linked executable code is emitted.

公开(公告)号：CA2503263A1

公开(公告)日：2005-10-30

申请号：CA2503263

申请日：2005-04-19

Applicant: IBM

Inventor： BLAINEY ROBERT JAMES ,  ARCHAMBAULT ROCH GEORGES ,  GAO YAOQING

IPC: G06F9/45

Abstract: A compiling program with cache utilization optimizations employs an inter- procedural global analysis of the data access patterns of compile units to be processed . The global analysis determines sufficient information to allow intelligent application of optimization techniques to be employed to enhance the operation and utilization of the available cache systems on target hardware.

公开(公告)号：CA2365375A1

公开(公告)日：2003-06-18

申请号：CA2365375

申请日：2001-12-18

Applicant: IBM CANADA

Inventor： HALL CHARLES BRIAN ,  ZHANG YINGWEI ,  BLAINEY ROBERT JAMES ,  ARCHAMBAULT ROCH GEORGES

IPC: G06F9/44 ,  G06F9/45

Abstract: An embodiment of the present invention provides an optimizer for optimizing source code to generate optimized source code having instructions for instructing a central processing unit (CPU) to iteratively compute values for a primary recurrence element. A computer programmed loop for computing the primary recurrence element and subsequent recurrence elements is an example of a case involving iteratively computing the primary recurrence element. The CPU is operatively coupled to fast operating memory (FOM) and operativel y coupled to slow operating memory (SOM). SOM stores the generated optimized source code. The optimized source code includes instructions for instructing said CPU to stor e a computed value of the primary recurrence element in a storage location of FOM. The instructions also includes instructions to consign the computed value of the primary recurrence element from the storage location to another storage location of the FOM.