11.
    发明专利
    未知

    公开(公告)号:DE602004006858T2

    公开(公告)日:2008-02-14

    申请号:DE602004006858

    申请日:2004-04-14

    Applicant: IBM

    Abstract: Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.

    Minimizing power consumption for fixed-frequency processing unit operation

    公开(公告)号:GB2515223B

    公开(公告)日:2015-04-15

    申请号:GB201417152

    申请日:2013-03-27

    Applicant: IBM

    Abstract: A mechanism is provided for minimizing power consumption for operation of a fixed-frequency processing unit. A number of timeslots are counted in a time window where throttling is engaged to the fixed-frequency processing unit. The number of timeslots where throttling is engaged is divided by a total number of timeslots within the time window, thereby producing a performance loss (PLOSS) value. A determination is made as to whether determining whether the (PLOSS) value associated with the fixed-frequency processing unit is greater than an allowed performance loss (APLOSS) value. Responsive to the PLOSS value being less than or equal to the APLOSS value, a decrease in voltage supplied to the fixed-frequency processing unit is initiated.

    Minimizing power consumption for fixed-frequency processing unit operation

    公开(公告)号:GB2515223A

    公开(公告)日:2014-12-17

    申请号:GB201417152

    申请日:2013-03-27

    Applicant: IBM

    Abstract: A mechanism is provided for minimizing power consumption for operation of a fixed-frequency processing unit. A number of timeslots are counted in a time window where throttling is engaged to the fixed-frequency processing unit. The number of timeslots where throttling is engaged is divided by a total number of timeslots within the time window, thereby producing a performance loss (PLOSS) value. A determination is made as to whether determining whether the (PLOSS) value associated with the fixed-frequency processing unit is greater than an allowed performance loss (APLOSS) value. Responsive to the PLOSS value being less than or equal to the APLOSS value, a decrease in voltage supplied to the fixed-frequency processing unit is initiated.

    ACCOUNTING METHOD AND LOGIC FOR DETERMINING PER-THREAD PROCESSOR RESOURCE UTILIZATION IN A SIMULTANEOUS MULTI-THREADED (SMT) PROCESSOR

    公开(公告)号:CA2518468A1

    公开(公告)日:2004-11-04

    申请号:CA2518468

    申请日:2004-04-14

    Applicant: IBM

    Abstract: An accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor provides a mechanism for accounting for processor resource usage by programs and thread s within programs. Relative resource use is determined by detecting instructio n dispatches for multiple threads active within the processor, which may inclu de idle threads that are still occupying processor resources. If instructions a re dispatched for all threads or no threads, the processor cycle is accounted equally to all threads. Alternatively if no threads are in a dispatch state, the accounting may be made using a prior state, or in conformity with ratios of the threads' priority levels. If only one thread is dispatching, that thread is accounted the entire processor cycle. If multiple threads are dispatching, but less than all threads are dispatching (in processors supporting more than two threads), the processor cycle is billed evenly acro ss the dispatching threads. Multiple dispatches may be detected for the threads and a fractional resource usage determined for each thread and the counters may be updated in accordance with their fractional usage.

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