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公开(公告)号：JP2003224309A
公开(公告)日：2003-08-08
申请号：JP2002333252
申请日：2002-11-18
Applicant: IBM
Inventor： GHOSHAL UTTAM SHYAMALINDU
IPC: F25B21/02 , H01L21/60 , H01L23/38 , H01L35/10 , H01L35/16 , H01L35/18 , H01L35/30 , H01L35/32 , H01L35/34
Abstract: PROBLEM TO BE SOLVED: To provide a method in which a thermoelement for a thermoelectric cooler is formed. SOLUTION: In one embodiment, a first substrate 226 with a plurality of pointed chips 250 separated by a plurality of bottoms is formed first. The first substrate 226 is covered with metallic layers 218 and 220. Parts of the metallic layers 218 and 220 are covered with insulators, and the other sections of the metallic layers are exposed. The exposed other sections of the metallic layers are covered with the protective films 214 and 216 of thermoelectric materials. The second substrate 202 composed of the thermoelectric material is fused on the side of the pointed chip 250 of the first substrate 226. The second substrate 202 is fused by melting the protective films 214 and 216 of the thermoelectric materials by heating the rear of the first substrate 226 or melting the protective films 214 and 216 of the thermoelectric materials by generating Joule heat by making a current flow in the pointed chips 250. COPYRIGHT: (C)2003,JPO
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公开(公告)号：JP2003347606A
公开(公告)日：2003-12-05
申请号：JP2003103274
申请日：2003-04-07
Inventor： GHOSHAL UTTAM SHYAMALINDU
CPC classification number: H01L35/32 , F25B21/02 , H01L2924/0002 , Y10S977/833 , H01L2924/00
Abstract: PROBLEM TO BE SOLVED: To provide a horizontally structured thermoelectric cooling system improved in its efficiency and cooling power. SOLUTION: The thermoelectric cooling system incorporates quantum cold point connections having a lateral thermoelectric element arrangement. A preferable system has n- and p-type thermoelectric elements each connected to a common conduction region. These thermoelectric elements have taper ends contacted to the common conduction region. All these thermoelectric elements preferably mutually occupy the same plane as the common conduction region. COPYRIGHT: (C)2004,JPO
Abstract translation: 要解决的问题：提供一种提高其效率和冷却功率的水平结构的热电冷却系统。 解决方案：热电冷却系统包括具有横向热电元件布置的量子冷点连接。 优选的系统具有各自连接到共同导电区域的n型和p型热电元件。 这些热电元件具有与共同导电区域接触的锥形端。 所有这些热电元件优选地相互占据与公共导电区域相同的平面。 版权所有（C）2004，JPO
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13.发明专利
公开(公告)号：JP2003269816A
公开(公告)日：2003-09-25
申请号：JP2002333218
申请日：2002-11-18
Applicant: IBM
Inventor： GHOSHAL UTTAM SHYAMALINDU
Abstract: PROBLEM TO BE SOLVED: To provide an apparatus for transporting and ejecting heat energy. SOLUTION: A heat transporter includes a photonic microheatpipe and a source of photons. The photonic microheatpipe is a photonic crystal that shows pronounced Raman effect and is thermally coupled to a heat source. When a photon scatters back from phonons (lattice vibrations) in the crystal, the properties of the reflected spectrum are governed by the Raman effect. According to the present invention, the photonic crystal is selected such that the Stokes lines are suppressed while the anti-Stokes lines are not attenuated. Hence the photons reflected from the photonic crystal have frequencies (and energy) greater than the incident photons. Thus, heat energy represented as acoustic phonons is transferred into photons. The photons corresponding to the anti-Stokes lines are transmitted through the photonic microheatpipe away from the heat source to a suitable point for rejecting the heat energy. COPYRIGHT: (C)2003,JPO
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14.发明专利
公开(公告)号：JP2002131211A
公开(公告)日：2002-05-09
申请号：JP2001241316
申请日：2001-08-08
Applicant: IBM
Inventor： GHOSHAL UTTAM SHYAMALINDU
Abstract: PROBLEM TO BE SOLVED: To provide a method and device, capable of solving the problem of the conventional method on the thermal parasitic loss and structural stability of a thermoelectric matter, and measuring the thermal and electric characteristics of the thermoelectric matter. SOLUTION: The method and device, for measuring a microscopic thermoelectric matter sample and analyzing its characteristics through the use of a scanning microscope, are provided. On the basis of simultaneous thermal and electrical measurements using scanning thermal probes, the applicability of a scanning thermal microscope (SThM) is expanded for analyzing the characteristics of the thermoelectric matter. A thermocouple with two probes is used to measure voltages at the tips and bottom parts of the cone chips of the probes. From the voltages and voltages measured extending over the sample matter, the Seebeck coefficient, thermal conductivity, and resistance of the sample matter are determined accurately.
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公开(公告)号：DE60318724T2
公开(公告)日：2009-01-02
申请号：DE60318724
申请日：2003-07-10
Applicant: IBM
Inventor： BURNS JEFFREY L , DRAKE ALAN J , GHOSHAL UTTAM SHYAMALINDU , NOWKA KEVIN J
Abstract: A system and integrated circuit (die) including a clock generator that includes an on-chip inductor and uses the inherent capacitance of the load to generate a sinusoidal clock signal. The inductor is connected between a current source and an inverting switch. The output of the switch is a substantially sinusoidal signal that connected directly to at least a portion of the clock driven circuits without intermediate buffering. In the preferred embodiment, the clock generator is a dual phase design that includes a pair of cross-coupled MOSFET's, a pair of solid state on-chip inductors, and a current source. Each of the on-chip inductors is connected between the current source and the drain of one of the MOSFET's. The outputs of the clock generator are provided directly to the clock inputs of at least a portion of the clock driven circuits on the die. In this embodiment, the frequency of the clock generator output signal is predominantly determined by the inductance of the inductive elements and the capacitance of the clock driven circuitry. This design eliminates the need for incorporating distinct capacitor elements in the clock generator itself and produces a clock generator in which a significant portion of the power oscillates between the generator's inductive elements and the capacitive elements of the load thereby reducing the power required to be supplied by the current source.
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Patent Agency Ranking
公开(公告)号：AU2003250200A1
公开(公告)日：2004-03-11
申请号：AU2003250200
申请日：2003-07-10
Applicant: IBM
Inventor： GHOSHAL UTTAM SHYAMALINDU , NOWKA KEVIN J , BURNS JEFFREY L , DRAKE ALAN J
Abstract: A system and integrated circuit (die) including a clock generator that includes an on-chip inductor and uses the inherent capacitance of the load to generate a sinusoidal clock signal. The inductor is connected between a current source and an inverting switch. The output of the switch is a substantially sinusoidal signal that connected directly to at least a portion of the clock driven circuits without intermediate buffering. In the preferred embodiment, the clock generator is a dual phase design that includes a pair of cross-coupled MOSFET's, a pair of solid state on-chip inductors, and a current source. Each of the on-chip inductors is connected between the current source and the drain of one of the MOSFET's. The outputs of the clock generator are provided directly to the clock inputs of at least a portion of the clock driven circuits on the die. In this embodiment, the frequency of the clock generator output signal is predominantly determined by the inductance of the inductive elements and the capacitance of the clock driven circuitry. This design eliminates the need for incorporating distinct capacitor elements in the clock generator itself and produces a clock generator in which a significant portion of the power oscillates between the generator's inductive elements and the capacitive elements of the load thereby reducing the power required to be supplied by the current source.
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公开(公告)号：HK1030808A1
公开(公告)日：2001-05-18
申请号：HK01101694
申请日：2001-03-09
Applicant: IBM
Inventor： GHOSHAL UTTAM SHYAMALINDU
Abstract: Apparatus and method for sub-ambient cooling using thermoelectric element dynamics in conjunction with pulsed electrical power and selectively enabled thermal coupling to the cold sink. In one form, Peltier devices are dynamically enabled using pulses of electrical power while the thermal path between the cold side of the Peltier device and the cold sink is selectively switched in relative synchronism between conductive states responsive to the dynamics of the Peltier device temperatures. Switched coupling of the thermal connection between the cold sink and the Peltier device materially improves efficiency by decoupling Joule heating and conductive heat transfer losses otherwise conveyed from the Peltier device. Preferable implementations utilizes MEMS to accomplish the selective thermal switching, whereby sub-ambient cooling capacity is increased by parallel operation of multiple Peltier devices and MEMS switches.
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公开(公告)号：CA2426562C
公开(公告)日：2007-07-31
申请号：CA2426562
申请日：2001-12-11
Applicant: IBM
Inventor： GHOSHAL UTTAM SHYAMALINDU
IPC: H01L23/38 , H01L23/522 , H01L23/66 , H01L35/00
Abstract: An apparatus for cooling selected elements within an integrated circuit, suc h as active transistors or passive circuit elements used in a radio frequency integrated circuit is provided. In one embodiment, the cooling apparatus includes a cold plate thermally coupled to the region proximate the integrat ed circuit element, a thermoelectric cooler thermally coupled to the cold plate ; and a hot plate thermally coupled to the thermoelectric cooler. Heat is removed from the integrated circuit element through the cold plate and transmitted to the hot plate through the thermoelectric cooler. In one form, the hot plate is located or coupled to an exterior surface of an integrated circuit, such that heat transmitted to the ambient from the integrated circu it element is dissipated into the atmosphere surrounding the integrated circuit . In another form, the hot plate is embedded in the integrated circuit substra te to locally cool elements of the integrated circuit while dumping the heat in to the substrate.
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公开(公告)号：MY115607A
公开(公告)日：2003-07-31
申请号：MYPI9804492
申请日：1998-09-30
Applicant: IBM
Inventor： GHOSHAL UTTAM SHYAMALINDU
Abstract: APPARATUS AND METHOD FOR SUB-AMBIENT COOLING USING THERMOELECTRIC ELEMENT DYNAMICS IN CONJUCTION WITH PULSED ELECTRICAL POWER AND SELECTIVELY ENABLE THERMAL COUPLING TO THE COLD SINK. IN ONE FORM, PELTIER DEVICES (1) ARE DYNAMICALLY ENABLED USING PULSES OF ELECTRICAL POWER WHILE THE THERMAL PATH BETWEEN THE COLD SIDE OF THE PELTIER DEVICE (1) AND THE COLD SINK (4) IS SELECTIVELY SWITCHED IN RELATIVE SYNCHRONISM BETWEEN CONDUCTIVE STATES RESPONSIVE TO THE DYNAMICS OF THE PELTIER DEVICE TEMPERATURES. SWITCHED COUPLING OF THE THERMAL CONNECTION BETWEEN THE COLD SINK (4) AND THE PELTIER DEVICE MATERIALLY IMPROVES EFFICIENCY BY DECOUPLING JOULE HEATING AND CONDUCTIVE HEAT TRANSFER LOSSES OTHERWISE CONVEYED FROM THE PELTIER DEVICE. PREFERABLE IMPLEMENTATIONS UTILIZES MEMS TO ACCOMPLISH THE SELECTIVE THERMAL SWITCHING, WHEREBY SUB-AMBIENT COOLING CAPACITY IS INCREASED BY PARALLEL OPERATION OF MULTIPLE PELTIER DEVICES AND MEMS SWITCHES. (FIG. 3)
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公开(公告)号：CA2427427A1
公开(公告)日：2002-06-13
申请号：CA2427427
申请日：2001-11-23
Applicant: IBM
Inventor： DOYLE JAMES , SPEIDELL JAMES , CORDES STEVEN , GHOSHAL UTTAM SHYAMALINDU , DIMILIA DAVID
Abstract: A thermoelectric device with enhanced structured interfaces for improved cooling efficiency is provided. In one embodiment, the thermoelectric device includes a first thermoelement comprising a superlattice of p-type thermoelectric material and a second thermoelement comprising superlattice of n-type thermoelectric material. The first and second thermoelements are electrically coupled to each other. The planer surface of the first thermoelement is proximate to, without necessarily being in physical contact with, a first array of electrically conducting tips at a discrete set of points such that electrical conduction between the planer surface of the first thermoelement and the first array of electrically conducting tips is facilitated while thermal conductivity between the two is retarded. A planer surface of the second thermoelement is proximate to, without necessarily being in physical contact with, a second array of electrically conducting tips at a discrete set of points such that electrical conduction between the electrically conducting tips and the planer surface of the second thermoelement is facilitated while thermal conduction between the two is retarded. The electrically conducting tips are coated with a material that has the same Seebeck coefficient as the material of the nearest layer of the superlattice to the tip.
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