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公开(公告)号：WO0247177A3
公开(公告)日：2002-12-05
申请号：PCT/GB0105193
申请日：2001-11-23
Inventor： GHOSHAL UTTAM SHYAMALINDU , CORDES STEVEN , DIMILIA DAVID , DOYLE JAMES , SPEIDELL JAMES
Abstract: A thermoelectric device with enhanced structured interfaces for improved cooling efficiency is provided. In one embodiment, the thermoelectric device includes a first thermoelement comprising a superlattice of p-type thermoelectric material and a second thermoelement comprising superlattice of n-type thermoelectric material. The first and second thermoelements are electrically coupled to each other. The planer surface of the first thermoelement is proximate to, without necessarily being in physical contact with, a first array of electrically conducting tips at a discrete set of points such that electrical conduction between the planer surface of the first thermoelement and the first array of electrically conducting tips is facilitated while thermal conductivity between the two is retarded. A planer surface of the second thermoelement is proximate to, without necessarily being in physical contact with, a second array of electrically conducting tips at a discrete set of points such that electrical conduction between the electrically conducting tips and the planer surface of the second thermoelement is facilitated while thermal conduction between the two is retarded. The electrically conducting tips are coated with a material that has the same Seebeck coefficient as the material of the nearest layer of the superlattice to the tip.
Abstract translation: 提供具有增强的结构化界面以提高冷却效率的热电装置。 在一个实施例中，热电装置包括包含p型热电材料的超晶格的第一热电元件和包含n型热电材料的超晶格的第二热电元件。 第一和第二热电元件彼此电连接。 第一热电元件的平面表面在不连续的一组点处与第一导电尖端阵列接近，而不必与其物理接触，使得第一热电元件的平面表面和第一电气电极阵列之间的电传导 导电尖端被促进，而两者之间的热传导被阻滞。 第二热电元件的平面表面在不连续的一组点处与第二导电尖端阵列接近，而不需要物理接触，使得导电尖端和第二热电元件的平面表面之间的电传导是 而两者之间的热传导被推迟。 导电尖端涂有塞贝克系数与最接近尖端超晶格层的材料相同的材料。
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Patent Agency Ranking
公开(公告)号：DE60235872D1
公开(公告)日：2010-05-20
申请号：DE60235872
申请日：2002-02-07
Applicant: IBM
Inventor： ACOSTA RAUL , LUND JENNIFER , GROVES ROBERT , ROSNER JOANNA , CORDES STEVEN , CARASSO MELANIE
Abstract: Inductor losses to a semiconducting substrate are eliminated in an IC structure by etching a well into the substrate down to the insulating layer coating the substrate and fabricating a grounded Faraday shield in the shape of elongated segments in the bottom of the well. The well lies directly below the inductor and is optionally filled with cured low-k organic dielectric or air.
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公开(公告)号：AT463828T
公开(公告)日：2010-04-15
申请号：AT02711020
申请日：2002-02-07
Applicant: IBM
Inventor： ACOSTA RAUL , LUND JENNIFER , GROVES ROBERT , ROSNER JOANNA , CORDES STEVEN , CARASSO MELANIE
Abstract: Inductor losses to a semiconducting substrate are eliminated in an IC structure by etching a well into the substrate down to the insulating layer coating the substrate and fabricating a grounded Faraday shield in the shape of elongated segments in the bottom of the well. The well lies directly below the inductor and is optionally filled with cured low-k organic dielectric or air.
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公开(公告)号：CA2427427A1
公开(公告)日：2002-06-13
申请号：CA2427427
申请日：2001-11-23
Applicant: IBM
Inventor： DOYLE JAMES , SPEIDELL JAMES , CORDES STEVEN , GHOSHAL UTTAM SHYAMALINDU , DIMILIA DAVID
Abstract: A thermoelectric device with enhanced structured interfaces for improved cooling efficiency is provided. In one embodiment, the thermoelectric device includes a first thermoelement comprising a superlattice of p-type thermoelectric material and a second thermoelement comprising superlattice of n-type thermoelectric material. The first and second thermoelements are electrically coupled to each other. The planer surface of the first thermoelement is proximate to, without necessarily being in physical contact with, a first array of electrically conducting tips at a discrete set of points such that electrical conduction between the planer surface of the first thermoelement and the first array of electrically conducting tips is facilitated while thermal conductivity between the two is retarded. A planer surface of the second thermoelement is proximate to, without necessarily being in physical contact with, a second array of electrically conducting tips at a discrete set of points such that electrical conduction between the electrically conducting tips and the planer surface of the second thermoelement is facilitated while thermal conduction between the two is retarded. The electrically conducting tips are coated with a material that has the same Seebeck coefficient as the material of the nearest layer of the superlattice to the tip.
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公开(公告)号：AT478438T
公开(公告)日：2010-09-15
申请号：AT02725187
申请日：2002-03-13
Applicant: IBM
Inventor： ACOSTA RAUL , CARASSO MELANIE , CORDES STEVEN , GROVES ROBERT , LUND JENNIFER , ROSNER JOANNA
IPC: H01L29/82 , H01F17/00 , H01F17/04 , H01F17/06 , H01F27/00 , H01F27/06 , H01F41/04 , H01L21/02 , H01L27/08 , H01L29/00
Abstract: A means for fabrication of solenoidal inductors integrated in a semiconductor chip is provided. The solenoidal coil is partially embedded in a deep well etched into the chip substrate. The non-embedded part of the coil is fabricated as part of the BEOL metallization layers. This allows for a large cross-sectional area of the solenoid turns, thus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The fabrication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric followed by fabrication of the part of the coil that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric and planarization of same by CMP. After planarization the fabrication of the remaining part of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil part of it may be built by electrodeposition through a mask on top of the BEOL layers.
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公开(公告)号：AU2388802A
公开(公告)日：2002-06-18
申请号：AU2388802
申请日：2001-11-23
Applicant: IBM
Inventor： CORDES STEVEN , DIMILIA DAVID , DOYLE JAMES , SPEIDELL JAMES
Abstract: A thermoelectric device with enhanced structured interfaces for improved cooling efficiency is provided. In one embodiment, the thermoelectric device includes a first thermoelement comprising a supetlattice of p-type thermoelectric material and a second thermoelement comprising superlattice of n-type thermoelectric material. The first and second thermoelements are electrically coupled to each other. The first thermoelement is proximate to, without necessarily being in physical contact with, a first array of electrically conducting tips at a discrete set of points. A planer surface of the second thermoelement is proximate to, without necessarily being in physical contact with, a second array of electrically conducting tips at a discrete set of points. The electrically conducting tips are coated with a material that has the same Seebeck coefficient as the material of the nearest layer of the superlattice to the tip.
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