公开(公告)号：ES3003788T3

公开(公告)日：2025-03-11

申请号：ES22710976

申请日：2022-02-18

Applicant: IBM

Inventor： SCHWARZ ERIC ,  SCHELM KERSTIN ,  LEBER PETRA ,  MUELLER SILVIA ,  COPELAND REID ,  GUO XIN ,  LICHTENAU CEDRIC

IPC: G06F9/30

Abstract: Se proporciona una instrucción para realizar operaciones de conversión y escalado. La ejecución de la instrucción incluye convertir un valor de entrada en un formato para proporcionar un resultado convertido en otro formato. El resultado convertido se escala para proporcionar un resultado escalado. Un resultado obtenido a partir del resultado escalado se coloca en una ubicación seleccionada. Además, se proporciona una instrucción para realizar operaciones de escalado y conversión. La ejecución de la instrucción incluye escalar un valor de entrada en un formato para proporcionar un resultado escalado y convertir el resultado escalado desde un formato para proporcionar un resultado convertido en otro formato. Un resultado obtenido a partir del resultado convertido se coloca en una ubicación seleccionada. (Traducción automática con Google Translate, sin valor legal)

公开(公告)号：AU2022292067B2

公开(公告)日：2024-11-28

申请号：AU2022292067

申请日：2022-06-13

Applicant: IBM

Inventor： LICHTENAU CEDRIC ,  BRADBURY JONATHAN ,  ALBARAKAT LAITH ,  WEISHAUPT SIMON

IPC: G06N3/04 ,  G06N3/063

Abstract: An instruction to perform a recurrent neural network cell activation is executed. The executing includes performing a plurality of operations of the recurrent neural network cell activation to provide a result of the recurrent neural network cell activation. The plurality of operations is performed in a single invocation of the instruction. The recurrent neural network cell activation is, for instance, a long short-term memory cell activation or a gated recurrent unit cell activation.

公开(公告)号：ZA202105937B

公开(公告)日：2022-07-27

申请号：ZA202105937

申请日：2021-08-18

Applicant: IBM

Inventor： LICHTENAU CEDRIC ,  COPELAND REID ,  LEBER PETRA ,  MUELLER SILVIA ,  BRADBURY JONATHAN ,  GUO XIN

Abstract: Negative zero control for execution of an instruction. A process obtains an instruction to perform operation(s) using an input value. The instruction includes a negative zero control indicator indicating whether negative zero control is enabled for execution of the instruction. The process executes the instruction, the executing including performing the operation(s) using the input value to obtain a result having a sign, determining whether to control the sign of the result, the determining being based at least in part on the negative zero control indicator being set to a defined value, and performing further processing, as part the executing the instruction, based on the determining.

公开(公告)号：ZA202105524B

公开(公告)日：2022-06-29

申请号：ZA202105524

申请日：2021-08-03

Applicant: IBM

Inventor： LICHTENAU CEDRIC ,  BRADBURY JONATHAN ,  SCHWARZ ERIC MARK ,  FIGULI RAZVAN PETER ,  PAYER STEFAN

Abstract: An instruction is provided for performing a vector string search. The instruction to be processed is obtained, with the instruction being defined to be a string search instruction to locate occurrence of a substring within a string. The instruction is processed, with the processing including searching the string specified in one operand of the instruction using the substring specified in another operand of the instruction. Based on the searching locating a first full match of the substring within the string, a full match condition indication is returned with position of the first full match in the string, and based on the searching locating only a partial match of the substring at a termination of the string, a partial match condition indication is returned, with the position of the partial match in the string.

公开(公告)号：DE112020004295T5

公开(公告)日：2022-06-23

申请号：DE112020004295

申请日：2020-08-07

Applicant: IBM

Inventor： FIGULI RAZVAN ,  PAYER STEFAN ,  LICHTENAU CEDRIC ,  SCHELM KERSTIN

IPC: G06F11/07

Abstract: Ein Verfahren zum Erkennen von Defekten bei Teilzeichenfolgen-Suchoperationen aufweist Bereitstellen, unter Verwendung einer Prozessoreinheit, welche Vektorregister von jeweils M Vektorelementen aufweist, einer MxM-Matrix von Komparatoren zum Zeichen-für-Zeichen-Vergleich der Elemente einer Referenzzeichenfolge, die in einem ersten der Vektorregister gespeichert ist, mit einer Zielzeichenfolge, die in einem zweiten der Vektorregister gespeichert ist. Ein Vektorelement ist ein n-Bit-Element zum Codieren eines Zeichens. Unter Anwendung eines Vergleichs, der von der MxM-Matrix durchgeführt wird, wird ein resultierender Bitvektor erzeugt. Der resultierende Bitvektor zeigt Zeichen der Zielzeichenfolge an, welche vollständig mit der Referenzzeichenfolge übereinstimmen, und zeigt Zeichen der Zielzeichenfolge an, welche teilweise mit der Referenzzeichenfolge übereinstimmen. Unter Verwendung des resultierenden Bitvektors wird in den Teilzeichenfolgen-Suchoperationen eine Defekterkennung durchgeführt.

公开(公告)号：CA3141920A1

公开(公告)日：2020-08-20

申请号：CA3141920

申请日：2020-02-11

Applicant: IBM

Inventor： LICHTENAU CEDRIC ,  BRADBURY JONATHAN ,  SCHWARZ ERIC MARK ,  FIGULI RAZVAN PETER ,  PAYER STEFAN

IPC: G06F16/903

Abstract: An instruction is provided for performing a vector string search. The instruction to be processed is obtained, with the instruction being defined to be a string search instruction to locate occurrence of a substring within a string. The instruction is processed, with the processing including searching the string specified in one operand of the instruction using the substring specified in another operand of the instruction. Based on the searching locating a first full match of the substring within the string, a full match condition indication is returned with position of the first full match in the string, and based on the searching locating only a partial match of the substring at a termination of the string, a partial match condition indication is returned, with the position of the partial match in the string.

公开(公告)号：GB2514126A

公开(公告)日：2014-11-19

申请号：GB201308598

申请日：2013-05-14

Applicant: IBM

Inventor： LICHTENAU CEDRIC ,  LOBO PREETHAM M ,  BROCK BISHOP ,  GLOEKLER TILMAN ,  KOENIG ANDREAS

IPC: G06F9/48

Abstract: An integrated circuit contains a service engine, which receives requests to execute tasks on a service processor. The tasks are assigned priorities. The state of the currently executing task indicates whether it can be interrupted without affecting its processing. When a request to execute a new task is received, the priority of the new task is compared with the priority of the currently executing task. If the currently executing task has a higher priority, it continues to execute. Otherwise, the engine waits a predetermined time. If, within that time, the executing task indicates that it can be interrupted, the executing task is terminated and the new task executed. If at the end of that time, the executing task has not indicated that it can be interrupted, it is terminated anyway and the new task is executed.

公开(公告)号：AU2022293984B2

公开(公告)日：2025-04-03

申请号：AU2022293984

申请日：2022-06-09

Applicant: IBM

Inventor： ALBARAKAT LAITH ,  BRADBURY JONATHAN ,  SLEGEL TIMOTHY ,  LICHTENAU CEDRIC ,  WEISHAUPT SIMON ,  SAPORITO ANTHONY

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/54

Abstract: A first processor processes an instruction configured to perform a plurality of functions. The plurality of functions includes one or more functions to operate on one or more tensors. A determination is made of a function of the plurality of functions to be performed. The first processor provides to a second processor information related to the function. The second processor is to perform the function. The first processor and the second processor share memory providing memory coherence.

公开(公告)号：AU2020221962B2

公开(公告)日：2022-12-01

申请号：AU2020221962

申请日：2020-02-11

Applicant: IBM

Inventor： LICHTENAU CEDRIC ,  BRADBURY JONATHAN ,  SCHWARZ ERIC MARK ,  FIGULI RAZVAN PETER ,  PAYER STEFAN

IPC: G06F16/903

Abstract: An instruction is provided for performing a vector string search. The instruction to be processed is obtained, with the instruction being defined to be a string search instruction to locate occurrence of a substring within a string. The instruction is processed, with the processing including searching the string specified in one operand of the instruction using the substring specified in another operand of the instruction. Based on the searching locating a first full match of the substring within the string, a full match condition indication is returned with position of the first full match in the string, and based on the searching locating only a partial match of the substring at a termination of the string, a partial match condition indication is returned, with the position of the partial match in the string.

公开(公告)号：CA3204507A1

公开(公告)日：2022-09-01

申请号：CA3204507

申请日：2022-02-18

Applicant: IBM

Inventor： SCHWARZ ERIC ,  LEBER PETRA ,  SCHELM KERSTIN ,  MUELLER SILVIA ,  COPELAND REID ,  GUO XIN ,  LICHTENAU CEDRIC

IPC: G06F9/30

Abstract: An instruction to perform scaling, converting and splitting operations is executed. The executing the instruction includes scaling an input value in one format to provide a scaled result. The scaled result is converted from the one format to provide a converted result in another format. The converted result is split into multiple parts, and one or more parts of the multiple parts are placed in a selected location.