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公开(公告)号：CA2071451C
公开(公告)日：1998-10-27
申请号：CA2071451
申请日：1992-06-17
Applicant: IBM
Inventor： FIN TONG-HAING , LIEN YEONG-CHANG
Abstract: To enable sharing of a screen, window or application by a plurality of processors connected through ISDN or the like, API calls to the operating system in a master processor, during execution, are transferred to slave processors by an event redirection mechanism. The API calls are then provided to the operating systems of the slave processors by their event redirection mechanisms, and the same screen or window appears at both the master processor and slave processors. Messages generated at the slave processors are likewise provided to the message queue of the master processor by the event, and then provided to the application of the master processor. Therefore the slave processors share the application of the master processor.
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公开(公告)号：DE3751003D1
公开(公告)日：1995-03-02
申请号：DE3751003
申请日：1987-09-18
Applicant: IBM
Inventor： DIAS DANIEL MANUEL , LIEN YEONG-CHANG , MARUYAMA KIYOSHI
Abstract: In a method for switching voice and data over a multistage interconnection network (MIN) (10), a plurality of bits are stored in respective storage locations (2-1, 2-2, ... 2-512) of the switching elements (5) of the MIN. Each storage location of a switching element represents a particular time slot in a frame or a sequence of frames. Bits (27, 26) stored in each location represent specific conditions of the inputs and outputs of the switching elements and also indicate which inputs of the switching elements will be connected to which outputs of the switching elements. This storage of control information in the switching elements allows the switching network to rapidly and simultaneously change connections through the switching elements of the network.
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公开(公告)号：DE68915608T2
公开(公告)日：1994-12-01
申请号：DE68915608
申请日：1989-03-08
Applicant: IBM
Inventor： CHAPPELL BARBARA ALANE , LIEN YEONG-CHANG , TANG JEFFREY YUH-FONG
Abstract: A transposable memory architecture for providing equally fast access to stored data in two or more dimensions. This architecture is provided by orthogonal wiring of access devices, word lines and bit lines with independent random accessing capability for data in each direction. The transposable memory architecture (TMA) cell directly implements the TMA architecture using only one access device per dimension of access. This invention also describes multiple transposable memory architecture (MTMA) device for additional data path flexibility. The read and write operations described provide access and cycle times approximately equivalent to those for a convention one-dimension RAM.
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公开(公告)号：CA2082118A1
公开(公告)日：1993-07-21
申请号：CA2082118
申请日：1992-11-04
Applicant: IBM
Inventor： LIEN YEONG-CHANG , SONE HIRONAO , SEKIYA KAZUO , KANADA YOSHIHISA
Abstract: A computer system is provided which allows adapters 2 to be inserted or removed while keeping the system operational, and which can automatically reconfigure the system according to insertion or removal of the adapters 2. When an adapter 2 is inserted, an adapter detection mechanism 11 informs a resource manager 19 of the insertion of the adapter 2 with an interrupt or the like. The resource manager 19 electrically and mechanically connects the adapter 2 immediately after its insertion, and reads the attribute information of the adapter 2 from a memory on the adapter 2 to perform the necessary setup, inclusion of the device driver necessary for the system, and assignment of memory and the like, thus enabling the adapter 2. When a user wants to remove an adapter, he or she issues an adapter removal request from an adapter removal button 12, or a keyboard, etc to the resource manager 19. This request is transmitted to the resource manager 19, which checks the running state of the adapter 2, and, if it can be removed, electrically and then mechanically disconnects it so that it can be removed. The user of the computer system removes the adapter 2 after it is disconnected.
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