公开(公告)号：GB2582080B

公开(公告)日：2022-03-09

申请号：GB202007187

申请日：2018-10-12

Applicant: IBM ,  ULVAC INC

Inventor： JOHN ROZEN ,  TAKASHI ANDO ,  VIJAY NARAYANAN ,  RUQIANG BAO ,  YOHEI OGAWA ,  MASANOBU HATANAKA

IPC: H01L21/8238 ,  H01L29/40

Abstract: A gate structure for effective work function adjustments of semiconductor devices that includes a gate dielectric on a channel region of a semiconductor device; a first metal nitride in direct contact with the gate dielectric; a conformal carbide of Aluminum material layer having an aluminum content greater than 30 atomic wt. %; and a second metal nitride layer in direct contact with the conformal aluminum (Al) and carbon (C) containing material layer. The conformal carbide of aluminum (Al) layer includes aluminum carbide, or Al4C3, yielding an aluminum (Al) content up to 57 atomic % (at. %) and work function setting from 3.9 eV to 5.0 eV at thicknesses below 25 Å. Such structures can present metal gate length scaling and resistance benefit below 25 nm compared to state of the art work function electrodes.

公开(公告)号：GB2562948A

公开(公告)日：2018-11-28

申请号：GB201812854

申请日：2017-01-06

Applicant: IBM

Inventor： RUQIANG BAO ,  SIDDARTH KRISHNAN ,  UNOH KWON ,  VIJAY NARAYANAN

IPC: H01L21/8238 ,  H01L27/092

Abstract: A method for fabricating a gate stack of a semiconductor device comprises forming a first dielectric layer over a channel region of the device, forming a first nitride layer over the first dielectric layer, depositing a scavenging layer on the first nitride layer, forming a capping layer over the scavenging layer, removing portions of the capping layer and the scavenging layer to expose a portion of the first nitride layer in a n-type field effect transistor (nFET) region of the gate stack, forming a first gate metal layer over the first nitride layer and the capping layer, depositing a second nitride layer on the first gate metal layer, and depositing a gate electrode material on the second nitride layer.

公开(公告)号：GB2519461B

公开(公告)日：2016-08-10

申请号：GB201501966

申请日：2013-08-08

Applicant: IBM

Inventor： JOHN BRULEY ,  VIJAY NARAYANAN ,  DIRK PFEIFFER ,  JEAN-OLIVER PLOUCHART ,  PEILIN SONG

IPC: H01L23/58 ,  H01L21/66 ,  H04L9/08

Abstract: The present disclosure relates to a secure device having a physical unclonable function and methods of manufacturing such a secure device. The device includes a substrate and at least one high-k/metal gate device formed on the substrate. The at least one high-k/metal gate device represents the physical unclonable function. In some cases, the at least one high-k/metal gate device may be subjected a variability enhancement. In some cases, the secure device may include a measurement circuit for measuring a property of the at least one high-k/metal gate device.