公开(公告)号：DE102006037538A1

公开(公告)日：2008-02-21

申请号：DE102006037538

申请日：2006-08-10

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MEYER THORSTEN ,  HEDLER HARRY ,  BRUNNBAUER MARKUS

IPC: H01L23/055 ,  H01L21/52 ,  H01L21/60 ,  H01L23/057 ,  H01L23/48 ,  H01L25/10

Abstract: An electronic device or devices and method for producing a device is disclosed. One embodiment provides an integrated component, a first package body and a contact device. The contact device penetrates the package body.

公开(公告)号：DE102006032073A1

公开(公告)日：2008-01-24

申请号：DE102006032073

申请日：2006-07-11

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MEYER THORSTEN ,  HEDLER HARRY ,  BRUNNBAUER MARKUS

IPC: H01L27/02 ,  H01L23/10

Abstract: A component and a method for producing a component are disclosed. The component comprises an integrated circuit, a housing body, a wiring device overlapping the integrated circuit and the housing body, and one or more external contact devices in communication with the wiring device.

公开(公告)号：DE10202881B4

公开(公告)日：2007-09-20

申请号：DE10202881

申请日：2002-01-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： IRSIGLER ROLAND ,  HEDLER HARRY ,  VASQUEZ BARBARA

IPC: H01L21/78 ,  H01L21/301 ,  H01L21/304 ,  H01L21/44 ,  H01L21/46 ,  H01L21/48 ,  H01L21/50 ,  H01L23/00

Abstract: The present invention provides a method of producing semiconductor chips (1a, 1b, 1c; 1a', 1b', 1c') with a protective chip-edge layer (21'', 22''), in particular for wafer level packaging chips, with the steps of: preparing a semiconductor wafer (1); providing trenches (21, 22) in the semiconductor wafer to establish chip edges on a first side of the semiconductor wafer (1); filling the trenches (21, 22) with a protective agent (21'; 22'); grinding back the semiconductor wafer (1) from a second side of the semiconductor wafer (1), which is opposite from the first side, to expose the trenches (21, 22) filled with the protective agent (21'; 22'); and cutting through the trenches (21, 22) filled with the protective agent (21'; 22'), so that the protective chip-edge layer (21'', 22'') comprising the protective agent (21', 22') remains on the chip edges.

公开(公告)号：DE10134011B4

公开(公告)日：2007-08-16

申请号：DE10134011

申请日：2001-07-12

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HEDLER HARRY ,  MEYER THORSTEN ,  VASQUEZ BARBARA

IPC: H01L23/50 ,  H01L23/498 ,  H05K1/02 ,  H05K3/32 ,  H05K3/34 ,  H05K3/40

公开(公告)号：DE102005041886B3

公开(公告)日：2007-03-22

申请号：DE102005041886

申请日：2005-09-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SINGLETON LAURENCE EDWARD ,  MEYER TORSTEN ,  DOBRITZ STEPHAN ,  HEDLER HARRY

IPC: H01L21/60 ,  H01L23/50

Abstract: In the production of a semiconductor element by applying projections (3) to at least the edge and central regions (A, B) of a first surface (101) of a semiconductor element (1), where the projections contain polymer precursor(s) and photosensitive initiator(s) for forming a polymer, and illuminating region(s) (C) of the projection(s), the illuminated regions have a higher elasticity modulus than the non-illuminated regions (D) of the projections.

公开(公告)号：DE102004050178B3

公开(公告)日：2006-05-04

申请号：DE102004050178

申请日：2004-10-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MEYER TORSTEN ,  HEDLER HARRY

IPC: H01L23/50 ,  H01L23/16 ,  H05K1/18

Abstract: A flip-chip component includes a chip with pads located on the chip and a chip frame, wherein the chip frame is arranged around the chip and is attached to the chip so that the active surface of the chip is substantially planar with a surface of the chip frame. A redistribution layer is attached to the chip and chip frame, and interconnections mechanically connect the redistribution layer and a board. Aspects of the invention improve the reliability of the flip-chip package by reducing shear stresses in the interconnections between the package and a board during changing temperatures. This is achieved by carefully selecting the material of the chip frame and designing the placement of the interconnections so that thermal expansion of the package matches that of the board during changing temperatures.

公开(公告)号：DE10334577B3

公开(公告)日：2005-02-10

申请号：DE10334577

申请日：2003-07-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： WOERNER HOLGER ,  POHL JENS ,  HEDLER HARRY

IPC: H01L21/60 ,  H01L23/538 ,  H05K3/30

Abstract: The invention relates to a method for applying rewiring to a panel. For this purpose, a panel is provided which has a coplanar overall upper side of an upper side of a plastic compound and the upper sides of semiconductor chips. The method provides a rewiring layer with implementation of external contacts and rewiring lines which, by means of a two-stage exposure step, compensates for position errors of the semiconductor chips in the component positions of the panel.

公开(公告)号：DE10239081A1

公开(公告)日：2004-03-11

申请号：DE10239081

申请日：2002-08-26

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HEDLER HARRY ,  MEYER THORSTEN ,  VASQUEZ BARBARA

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/498 ,  H01L23/50

Abstract: The production of a semiconductor device involves applying conductor strips (11, 12) to a semiconductor substrate (10), structuring the strips, and applying a solder layer (13) to the structured strips so that the solder layer absorbs the structure of the conductor strips. An Independent claim is also included for a semiconductor device produced by the above process.

公开(公告)号：DE10238816A1

公开(公告)日：2004-03-11

申请号：DE10238816

申请日：2002-08-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MEYER THORSTEN ,  HEDLER HARRY ,  VASQUEZ BARBARA ,  IRSIGLER ROLAND

IPC: H01L21/60 ,  H01L23/485 ,  H01L23/50

Abstract: Production of connecting regions of an integrated circuit (10) comprises applying a dielectric (12) on the circuit, applying an oxidizable and/or corrodable metallization (13, 14, 15) on the dielectric providing a contact with a contact unit (11) of the circuit, applying a protective unit (16) to prevent oxidation of the metallization underneath, and structuring the protective unit so that it is removed around the connecting regions. An Independent claim is also included for an integrated circuit containing the connecting regions.

公开(公告)号：DE10238581A1

公开(公告)日：2004-03-11

申请号：DE10238581

申请日：2002-08-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： HEDLER HARRY ,  MEYER THORSTEN ,  VASQUEZ BARBARA

IPC: H01L23/31 ,  H01L23/485 ,  H01L23/24 ,  H01L23/50

Abstract: The invention relates to a semiconductor component for mounting on a printed circuit board. The semiconductor component includes a housing that at least partially surrounds at least one flat semiconductor chip. Electrical contacts are assigned to the semiconductor chip and serve to establish an electrical connection to electrodes provided on a printed circuit board. The flat semiconductor chip has a mounting lateral surface that includes contact surfaces configured to make contact with the electrical contacts. A buffer layer is located between the housing and the chip, and surrounds the chip up to a supporting surface located on the mounting lateral surface.