METHOD FOR FORMING PROTECTIVE COATINGS ON WAFER BASE SURFACE

    公开(公告)号:JP2004006635A

    公开(公告)日:2004-01-08

    申请号:JP2003011776

    申请日:2003-01-21

    Abstract: PROBLEM TO BE SOLVED: To provide the rear processing method of a wafer to form a trench on the front surface of a wafer by sawing or etching, to grind the wafer from the base side, to fill the trench with protective materials, to coat the base front surface as the surface layer, and to harden it. SOLUTION: In this method, a trench is formed on the front surface of wafer 1 by sawing or etching, the wafer 1 is ground from the base side, the trench is filled with protective materials 8, which is also applied to the base surface as the surface layer. Then, the protective materials 8 are hardened in order to carry out the sawing process. In another embodiment of this method, double thin film layers are formed on the rear face of the wafer 1 including a mounting tape 6 and a protective layer 8 faced to the rear face of the wafer 1. COPYRIGHT: (C)2004,JPO

    METHOD FOR PRODUCING AN ELECTRONIC COMPONENT, ESPECIALLY A MEMORY CHIP
    2.
    发明申请
    METHOD FOR PRODUCING AN ELECTRONIC COMPONENT, ESPECIALLY A MEMORY CHIP 审中-公开
    方法生产电子部件,尤其是内存芯片

    公开(公告)号:WO03001588A3

    公开(公告)日:2003-03-06

    申请号:PCT/EP0205254

    申请日:2002-05-13

    Abstract: The invention relates to a method for producing an electronic component, especially a memory chip, using a laser-induced correction to equalise an integrated circuit by means of at least one laser via (15) in a layer at least partially covering the circuit. Said component comprises a rewiring of the contact pads. The inventive method comprises the following steps: each laser via is closed by means of a separate covering layer (16) which is to be applied locally; a rewiring extending between the local covering layers (16) is created; the local covering layers (16) are removed; and the laser-induced correction is carried out by means of the open laser vias.

    Abstract translation: 一种用于制造电子元件,特别是一个存储器芯片,经由一个或多个到电路至少部分地覆盖用于校准集成电路激光通孔(15)用激光索引修正引入层,其特征在于,所述部件具有接触垫的再布线的方法,包括 以下步骤:封闭每个激光通孔的单独局部施加外层(16)的装置; 产生所述覆盖层(16)延伸的重新布线之间的局部; 本地覆盖层的去除(16); 进行打开激光通孔的激光诱导的校正。

    FUSE PROGRAMMABLE I/O ORGANIZATION
    3.
    发明申请
    FUSE PROGRAMMABLE I/O ORGANIZATION 审中-公开
    熔丝可编程I / O组织

    公开(公告)号:WO03012795A3

    公开(公告)日:2003-07-17

    申请号:PCT/EP0208560

    申请日:2002-07-31

    CPC classification number: G11C7/1045 G11C2207/105 G11C2207/2254

    Abstract: Circuitry using fuse and anti-fuse latches (62) for selecting the number of input/output channels (98, 109) after encapsulation is disclosed. The various embodiments allow conventional bond pads (14, 16, 18) to be used for initial selection of the number of input/output channels prior to encapsulation. However, by providing different selection signals (52, 54), the number of input/output channels may be changed by the user at any time after encapsulation. Other embodiments employ "enable" latch circuits (133,135) allow the initial selection by the users at any time after encapsulation, and then at least one more subsequent selection.

    Abstract translation: 公开了使用熔断器和反熔断器锁存器(62)用于在封装之后选择输入/输出通道(98,109)的数量的电路。 各种实施例允许常规键合焊盘(14,16,18)用于在封装之前初始选择多个输入/输出通道。 然而,通过提供不同的选择信号(52,54),用户可以在封装后的任何时间改变输入/输出通道的数量。 其他实施例采用“启用”锁存电路(133,135)允许用户在封装之后的任何时间进行初始选择,然后进行至少一次后续选择。

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