Abstract:
PROBLEM TO BE SOLVED: To provide the rear processing method of a wafer to form a trench on the front surface of a wafer by sawing or etching, to grind the wafer from the base side, to fill the trench with protective materials, to coat the base front surface as the surface layer, and to harden it. SOLUTION: In this method, a trench is formed on the front surface of wafer 1 by sawing or etching, the wafer 1 is ground from the base side, the trench is filled with protective materials 8, which is also applied to the base surface as the surface layer. Then, the protective materials 8 are hardened in order to carry out the sawing process. In another embodiment of this method, double thin film layers are formed on the rear face of the wafer 1 including a mounting tape 6 and a protective layer 8 faced to the rear face of the wafer 1. COPYRIGHT: (C)2004,JPO
Abstract:
The invention relates to a method for producing an electronic component, especially a memory chip, using a laser-induced correction to equalise an integrated circuit by means of at least one laser via (15) in a layer at least partially covering the circuit. Said component comprises a rewiring of the contact pads. The inventive method comprises the following steps: each laser via is closed by means of a separate covering layer (16) which is to be applied locally; a rewiring extending between the local covering layers (16) is created; the local covering layers (16) are removed; and the laser-induced correction is carried out by means of the open laser vias.
Abstract:
Circuitry using fuse and anti-fuse latches (62) for selecting the number of input/output channels (98, 109) after encapsulation is disclosed. The various embodiments allow conventional bond pads (14, 16, 18) to be used for initial selection of the number of input/output channels prior to encapsulation. However, by providing different selection signals (52, 54), the number of input/output channels may be changed by the user at any time after encapsulation. Other embodiments employ "enable" latch circuits (133,135) allow the initial selection by the users at any time after encapsulation, and then at least one more subsequent selection.
Abstract:
The present invention provides a method for producing a semiconductor device, with the steps of: applying an interconnect level (11, 12) to a semiconductor substrate (10); structuring the interconnect level (12); and applying a solder layer (13) on the structured interconnect level (11, 12) in such a way that the solder layer
Abstract:
Integrated circuit (10) comprises an elastically deformable protrusion (11), a contact unit (13) formed on the protrusion to provide an electrical bond, and a rewiring unit (12) for electrically connecting an active semiconductor section of the circuit to the contact unit. The rewiring structure runs in a spiral manner on the protrusion and elastically deforms to contact an electrical unit. An Independent claim is also included for an alternative integrated circuit.
Abstract:
A process for producing a semiconductor chip having contact elements protruding on one chip side within the context of wafer level packaging, the chip side provided with the contact elements being coated with a covering compound forming a protective layer, from which the protruding contact element project.
Abstract:
Device for calibrating test cards (100') with unsprung contact elements (50') that are used to test semiconductor wafers has: a probe arrangement (200') that has first (KSIG') and second (KSCH') signal contact surfaces; and a positioning device for positioning the probe device on the test card so that first and second signal contact surfaces connect to first and second test card contact elements (50'); whereby the first and second contact surfaces are attached in a sprung manner to the probe arrangement.