公开(公告)号：DE102004022618A1

公开(公告)日：2005-12-15

申请号：DE102004022618

申请日：2004-05-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF ,  HAPP THOMAS

IPC: B82B3/00 ,  H01L21/8247

Abstract: The method involves disposing in a substrate a channel region (3), in which a charge carrier channel can be formed. A first insulation layer is provided on the channel region. A nano-porous mask layer is applied which comprises pore openings. A memory material is inserted into the pore openings. The mask layer is selectively removed so that the memory material remains as nano-point-like memory regions on the insulating layer. A second insulating layer is applied on the first insulating layer and between the memory regions, so that the memory regions are completely insulated from each other.

公开(公告)号：DE102004018715B3

公开(公告)日：2005-11-17

申请号：DE102004018715

申请日：2004-04-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF

IPC: G11C11/00 ,  G11C16/00 ,  H01L45/00

公开(公告)号：DE102004018859B3

公开(公告)日：2005-09-15

申请号：DE102004018859

申请日：2004-04-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF

IPC: G06F12/14 ,  G07C1/10 ,  G11C5/00 ,  G11C7/00 ,  G11C13/00 ,  G11C13/02 ,  H01L27/24 ,  H01L45/00

Abstract: The circuit has a memory cell with a PMC resistor, having a solid electrolyte material with a write circuit (2) for the memory cell creating an electrical connection to the solid electrolyte material. The write circuit is arranged so that the resistor has a resistance value and a logical condition of the memory cell corresponding to the time length of the data. The resistance value in the given length of time achieves or exceeds a given resistance threshold value.

公开(公告)号：DE102004011431B4

公开(公告)日：2007-09-27

申请号：DE102004011431

申请日：2004-03-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PINNOW CAY-UWE ,  SYMANCZYK RALF

IPC: H01L21/8239 ,  G11C11/24 ,  H01L27/105 ,  H01L27/115 ,  H01L27/24

公开(公告)号：DE102004040750A1

公开(公告)日：2006-03-09

申请号：DE102004040750

申请日：2004-08-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ROEHR THOMAS ,  SYMANCZYK RALF ,  KUND MICHAEL

IPC: G11C7/00 ,  G11C13/00

Abstract: A memory cell arrangement has a plurality of memory cells of the CBRAM type and a programming apparatus, the memory cells being arranged along bit lines and each bit line having a programming apparatus. The invention provides for the programming apparatus to comprise a charge storage device and a switchable charging apparatus. The inventive method for programming memory cells of the CBRAM type is carried out in such a manner that, a given quantity of an electrical charge is stored in a charge storage device, and the stored quantity of electrical charge is transferred to the memory cell to be programmed.

公开(公告)号：DE102004011431A1

公开(公告)日：2005-09-29

申请号：DE102004011431

申请日：2004-03-09

Applicant: INFINEON TECHNOLOGIES AG

Inventor： PINNOW CAY-UWE ,  SYMANCZYK RALF

IPC: G11C11/24 ,  H01L21/8239 ,  H01L27/105 ,  H01L27/24

公开(公告)号：DE10356285A1

公开(公告)日：2005-06-30

申请号：DE10356285

申请日：2003-11-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： UFERT KLAUS-DIETER ,  SYMANCZYK RALF ,  HAPP THOMAS ,  PINNOW CAY-UWE

IPC: H01L27/24 ,  H01L45/00

Abstract: An integrated semiconductor memory includes a storage medium (6) arranged between two electrodes (10, 20), which storage medium may be a phase change medium, for example. The storage medium (6) can be put into a first state or a second state by means of an electric current, as a result of which an item of information can be stored. According to embodiments of the invention, a layer plane (L) is provided in which impurity particles made from a material (4) are embedded, as a result of which the current density in the storage medium is locally increased and the programming current required for reprogramming is reduced. As a result, the current consumption of memory elements containing a phase change medium is reduced, so that for the first time they can be embodied with minimal feature size, together with other components such as transistors, and integrated into a single semiconductor circuit and no longer have to be arranged in separate subcircuits.

公开(公告)号：DE102006011461B4

公开(公告)日：2008-08-28

申请号：DE102006011461

申请日：2006-03-13

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF

IPC: H01L27/24 ,  H01L45/00

公开(公告)号：DE102006008491A1

公开(公告)日：2007-08-30

申请号：DE102006008491

申请日：2006-02-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF ,  PINNOW CAY-UWE

IPC: G11C13/04 ,  G11C11/42

Abstract: The structure (1) has an ion conducting layer (3), where a modification unit is connected with the ion conducting layer. The modification unit serves for changing electromagnetic characteristics of the ion conducting layer. A sending unit is provided for sending electromagnetic radiation to the ion conducting layer. A detection unit is provided for receiving the electromagnetic radiation from the ion conducting layer. The ion conducting layer changes its characteristics, when bias voltage is applied to the layer. An independent claim is also included for a method for reading out data from a memory cell.

公开(公告)号：DE102005003025A1

公开(公告)日：2006-08-03

申请号：DE102005003025

申请日：2005-01-22

Applicant: INFINEON TECHNOLOGIES AG

Inventor： SYMANCZYK RALF

IPC: G11C13/00

Abstract: The memory has a programmable metallization cell (PMC) memory cell (1) with a PMC component (2). The component exhibits a hysteresis with respect to an I-U characteristic curve with upper and lower measured current branches. A data retaining unit (5) applies memory voltage to the component for retaining states to be stored. The component is operated for storing related states in upper and lower current branches, respectively. An independent claim is also included for a method of storing data into a programmable metallization cell circuit memory.