AN ELECTRICALLY PROGRAMMABLE FUSE FOR SILICON-ON-INSULATOR (SOI) TECHNOLOGY
    11.
    发明申请
    AN ELECTRICALLY PROGRAMMABLE FUSE FOR SILICON-ON-INSULATOR (SOI) TECHNOLOGY 审中-公开
    一种用于硅绝缘体(SOI)技术的电可编程保险丝

    公开(公告)号:WO2006057980A2

    公开(公告)日:2006-06-01

    申请号:PCT/US2005042212

    申请日:2005-11-21

    CPC classification number: H01L23/5256 H01L27/1203 H01L2924/0002 H01L2924/00

    Abstract: A fuse structure and method of forming the same is described, wherein the conductive body (50) of the fuse is formed from a crystalline semiconductor body (52) on an insulator (53), preferably of a silicon-on-insulator wafer, surrounded by a fill-in dielectric (54). The fill-in dielectric (54) is preferably a material that minimizes stresses on the crystalline body (52), such as an oxide. The crystalline semiconductor body (52) may be doped. The conductive body (50) may also include a conductive layer (51), such as a silicide layer, on the upper surface of the crystalline semiconductor body (52). This fuse structure may be successfully programmed over a wide range of programming voltages and time.

    Abstract translation: 描述了一种熔丝结构及其形成方法,其中,熔丝的导电体(50)由绝缘体(53)上的晶体半导体本体(52)形成,绝缘体(53) 通过填充电介质(54)。 填充电介质(54)优选是使结晶体(52)上的应力最小化的材料,例如氧化物。 晶体半导体本体(52)可以被掺杂。 导电体(50)还可以包括在晶体半导体本体(52)的上表面上的诸如硅化物层的导电层(51)。 这种熔丝结构可以在广泛的编程电压和时间范围内成功编程。

    12.
    发明专利
    未知

    公开(公告)号:DE60307793D1

    公开(公告)日:2006-10-05

    申请号:DE60307793

    申请日:2003-02-27

    Abstract: The present invention provides a system, apparatus and method of programming via electromigration. A semiconductor fuse which includes a cathode and an anode coupled by a fuse link having an electrically conductive component, such as silicide, is coupled to a power supply. A potential is applied across the conductive fuse link via the cathode and anode in which the potential is of a magnitude to initiate electromigration of silicide from a region of the semiconductor fuse reducing the conductivity of the fuse link. The electromigration is enhanced by effectuating a temperature gradient between the fuse link and one of the cathode and anode responsive to the applied potential. Portions of the semiconductor fuse are selectively cooled in a heat transfer relationship to increase the temperature gradient. In one embodiment, a heat sink is applied to the cathode. The heat sink can be a layer of metal coupled in close proximity to the cathode while insulated from the fuse link. In another embodiment, the temperature gradient is increased by selectively varying the thickness of the underlying oxide layer such that the cathode is disposed on a thinner layer of oxide than the fuse link.

    Fin anti-fuse with reduced programming voltage

    公开(公告)号:GB2484634A

    公开(公告)日:2012-04-18

    申请号:GB201202057

    申请日:2010-08-04

    Applicant: IBM

    Abstract: A method forms an anti-fuse structure comprises a plurality of parallel conductive fins positioned on a substrate, each of the fins has a first end and a second end. A second electrical conductor is electrically connected to the second end of the fins. An insulator covers the first end of the fins and a first electrical conductor is positioned on the insulator. The first electrical conductor is electrically insulated from the first end of the fins by the insulator. The insulator is formed to a thickness sufficient to break down on the application of a predetermined voltage between the second electrical conductor and the first electrical conductor and thereby form an uninterrupted electrical connection between the second electrical conductor and the first electrical conductor through the fins.

    14.
    发明专利
    未知

    公开(公告)号:DE60307793T2

    公开(公告)日:2007-08-23

    申请号:DE60307793

    申请日:2003-02-27

    Abstract: The present invention provides a system, apparatus and method of programming via electromigration. A semiconductor fuse which includes a cathode and an anode coupled by a fuse link having an electrically conductive component, such as silicide, is coupled to a power supply. A potential is applied across the conductive fuse link via the cathode and anode in which the potential is of a magnitude to initiate electromigration of silicide from a region of the semiconductor fuse reducing the conductivity of the fuse link. The electromigration is enhanced by effectuating a temperature gradient between the fuse link and one of the cathode and anode responsive to the applied potential. Portions of the semiconductor fuse are selectively cooled in a heat transfer relationship to increase the temperature gradient. In one embodiment, a heat sink is applied to the cathode. The heat sink can be a layer of metal coupled in close proximity to the cathode while insulated from the fuse link. In another embodiment, the temperature gradient is increased by selectively varying the thickness of the underlying oxide layer such that the cathode is disposed on a thinner layer of oxide than the fuse link.

    Fin anti-fuse with reduced programming voltage

    公开(公告)号:GB2484634B

    公开(公告)日:2014-02-05

    申请号:GB201202057

    申请日:2010-08-04

    Applicant: IBM

    Abstract: A method forms an anti-fuse structure comprises a plurality of parallel conductive fins positioned on a substrate, each of the fins has a first end and a second end. A second electrical conductor is electrically connected to the second end of the fins. An insulator covers the first end of the fins and a first electrical conductor is positioned on the insulator. The first electrical conductor is electrically insulated from the first end of the fins by the insulator. The insulator is formed to a thickness sufficient to break down on the application of a predetermined voltage between the second electrical conductor and the first electrical conductor and thereby form an uninterrupted electrical connection between the second electrical conductor and the first electrical conductor through the fins.

    Rippen-Antisicherung mit verringerter Programmierspannung

    公开(公告)号:DE112010003252T5

    公开(公告)日:2013-01-03

    申请号:DE112010003252

    申请日:2010-08-04

    Applicant: IBM

    Abstract: Es wird ein Verfahren zum Bilden der Struktur einer Antisicherung beschrieben, die eine Vielzahl paralleler leitender Rippen umfasst, die auf einem Substrat angeordnet sind, wobei jede der Rippen ein erstes und ein zweites Ende aufweist. Ein zweiter elektrischer Leiter ist mit dem zweiten Ende der Rippen elektrisch verbunden. Ein Isolator bedeckt das erste Ende der Rippen, und ein erster elektrischer Leiter ist auf dem Isolator angeordnet. Der erste elektrische Leiter ist durch den Isolator vom ersten Ende der Rippen elektrisch isoliert. Der Isolator wird mit einer Dicke gebildet, die ausreicht, um beim Anlegen einer vorgegebenen Spannung zwischen dem zweiten elektrischen Leiter und dem ersten elektrischen Leiter durchzubrechen und dadurch über die Rippen eine ständige elektrische Verbindung zwischen dem zweiten elektrischen Leiter und dem ersten elektrischen Leiter zu bilden.

    17.
    发明专利
    未知

    公开(公告)号:DE60122878T2

    公开(公告)日:2007-04-05

    申请号:DE60122878

    申请日:2001-05-18

    Abstract: Described herein is a fuse incorporating a covering layer disposed on a conductive layer, which is disposed on a polysilicon layer. The covering layer preferably comprises a relatively inert material, such as a nitride etchant barrier. The covering layer preferably has a region of relatively less-inert filler material. Upon programming of the fuse, the conductive layer, which can be a silicide, preferentially degrades in the region underlying the filler material of the covering layer. This preferential degradation results in a predictable "blowing" of the fuse in the fuse region underlying the filler material. Since the "blow" area is predictable, damage to adjacent structures can be minimized or eliminated.

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