公开(公告)号：AU2005336130A1

公开(公告)日：2007-03-15

申请号：AU2005336130

申请日：2005-10-14

Applicant: NANOSYS INC

Inventor： MOSTARSHED SHAHRIAR ,  CHEN JIAN ,  ROMANO LINDA T ,  PAN YAOLING ,  LEON FRANCISCO

IPC: H01L29/76

Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate. A source contact and a drain contact are coupled to the semiconductor core of the nanowire at respective exposed portions of the semiconductor core.

公开(公告)号：AU2003260527A1

公开(公告)日：2003-10-20

申请号：AU2003260527

申请日：2003-04-01

Applicant: NANOSYS INC

Inventor： DUAN XIANGFENG ,  DANIELS HUGH ,  NIU CHUNMING ,  SAHI VIJENDRA ,  HAMILTON JIM ,  ROMANO LINDA T

IPC: B81C99/00 ,  C23F1/00 ,  H01L51/30 ,  H01L51/40

Abstract: Nanostructure manufacturing methods and methods for assembling nanostructures into functional elements such as junctions, arrays and devices are provided. Systems for practicing the methods are also provided.

公开(公告)号：CA2538262A1

公开(公告)日：2005-04-07

申请号：CA2538262

申请日：2004-09-15

Applicant: NANOSYS INC

Inventor： DUBROW ROBERT ,  ROMANO LINDA T ,  STUMBO DAVID

IPC: B82B3/00 ,  B82B20060101 ,  B82B1/00 ,  C30B7/00 ,  C30B21/02 ,  C30B28/06 ,  H01L21/00 ,  H01L21/20 ,  H01L21/36

Abstract: Methods and systems for depositing nanornaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanornaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation is optionally provided by moving the transfer and receiving substrates relative to each other during t he transfer process.

公开(公告)号：CA2532991A1

公开(公告)日：2005-02-24

申请号：CA2532991

申请日：2004-08-04

Applicant: NANOSYS INC

Inventor： PAN YAOLING ,  PARCE J WALLACE ,  BURETEA MIHAI ,  CHOW CALVIN ,  NIU CHUNMING ,  CHEN JIAN ,  ROMANO LINDA T ,  STUMBO DAVID

IPC: H01L21/283 ,  D02G3/00 ,  H01L21/336 ,  H01L21/44 ,  H01L29/06 ,  H01L29/12 ,  H01L29/423 ,  H01L29/786 ,  H01L33/06 ,  H01L33/24 ,  H01L51/00 ,  H01L51/05

Abstract: The present invention relates to a system and process for producing a nanowi re- material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally compris es separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into a electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite lay er emitting light at a different wavelength.

公开(公告)号：CA2499965A1

公开(公告)日：2004-04-15

申请号：CA2499965

申请日：2003-09-30

Applicant: NANOSYS INC

Inventor： CHEN JIAN ,  GOLDMAN JAY L ,  NIU CHUNMING ,  PARCE J WALLACE ,  BOCK LAWRENCE ,  DUAN XIANGFENG ,  SAHI VIJENDRA ,  EMPEDOCLES STEPHEN ,  STUMBO DAVID ,  ROMANO LINDA T

IPC: C01B31/02 ,  H01L21/00 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  H01L29/06 ,  H01L29/786 ,  H01L33/20 ,  H01L41/18 ,  H01L41/22 ,  H01L51/00 ,  H01L51/05 ,  H03H11/20

Abstract: A method and apparatus for an electronic substrate (1920) having a plurality of semiconductor devices is described. A thin film of nanowires (1910) is formed on a substrate. The thin film of nanowires (1910) is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions is defined in the thin film of nanowires. Contacts (1902) are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films includi ng p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, technique s for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

公开(公告)号：AU2003258969A1

公开(公告)日：2004-01-19

申请号：AU2003258969

申请日：2003-06-26

Applicant: NANOSYS INC

Inventor： STONAS WALTER ,  CHOW CALVIN ,  PARCE WALLACE J ,  PAN YAOLING ,  ROMANO LINDA T ,  MOSTARSHED SHAHRIAR ,  PONTIS GEORGE

IPC: C30B29/60 ,  G01N27/00 ,  G01N27/414 ,  G01N33/487 ,  H01L29/06 ,  G01N27/04

公开(公告)号：AU2003260527A8

公开(公告)日：2003-10-20

申请号：AU2003260527

申请日：2003-04-01

Applicant: NANOSYS INC

Inventor： ROMANO LINDA T ,  SAHI VIJENDRA ,  NIU CHUNMING ,  DUAN XIANGFENG ,  HAMILTON JIM ,  DANIELS HUGH

IPC: B81C99/00 ,  C23F1/00 ,  H01L51/30 ,  H01L51/40 ,  C09D5/00

Abstract: Nanostructure manufacturing methods and methods for assembling nanostructures into functional elements such as junctions, arrays and devices are provided. Systems for practicing the methods are also provided.

公开(公告)号：AU2003222134A1

公开(公告)日：2003-10-20

申请号：AU2003222134

申请日：2003-04-01

Applicant: NANOSYS INC

Inventor： CHOW CALVIN ,  DUAN XIANFENG ,  NIU CHUNGMING ,  PONTIS GEORGE ,  SAHI VIJENDRA ,  ROMANO LINDA T ,  STUMBO DAVID ,  EMPEDOCLES STEPHEN ,  BOCK LARRY

IPC: B81C99/00 ,  C23F1/00 ,  H01L51/30 ,  H01L51/40

Abstract: Nanostructure manufacturing methods and methods for assembling nanostructures into functional elements such as junctions, arrays and devices are provided. Systems for practicing the methods are also provided.

公开(公告)号：WO2007030126A9

公开(公告)日：2007-05-18

申请号：PCT/US2005037237

申请日：2005-10-14

Applicant: NANOSYS INC ,  MOSTARSHED SHAHRIAR ,  CHEN JIAN ,  LEON FRANCISCO ,  PAN YAOLING ,  ROMANO LINDA T

Inventor： MOSTARSHED SHAHRIAR ,  CHEN JIAN ,  LEON FRANCISCO ,  PAN YAOLING ,  ROMANO LINDA T

IPC: H01L29/76

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/785 ,  H01L29/78645 ,  H01L29/78681 ,  H01L29/7869 ,  Y10S977/762 ,  Y10S977/932 ,  Y10S977/938

Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate. A source contact and a drain contact are coupled to the semiconductor core of the nanowire at respective exposed portions of the semiconductor core.

Abstract translation: 描述了具有改进的门结构的电子设备的方法，系统和装置。 电子装置包括至少一个纳米线。 栅极接触沿至少一个纳米线的长度的至少一部分定位。 介电材料层在栅极接触和至少一个纳米线之间。 源极触点和漏极触点与至少一个纳米线接触。 源极触点和/或漏极触点的至少一部分沿着该纳米线的长度与栅极触点重叠。 另一方面，一种电子器件包括具有被绝缘壳层包围的半导体芯的纳米线。 环形第一栅极区域沿着纳米线长度的一部分包围纳米线。 第二栅极区沿着纳米线和衬底之间的纳米线的长度定位。 源极触点和漏极触点在半导体芯的相应的暴露部分处耦合到纳米线的半导体芯。

公开(公告)号：CA2589432C

公开(公告)日：2014-08-05

申请号：CA2589432

申请日：2005-10-14

Applicant: NANOSYS INC

Inventor： MOSTARSHED SHAHRIAR ,  CHEN JIAN ,  LEON FRANCISCO ,  PAN YAOLING ,  ROMANO LINDA T

IPC: H01L29/76

Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate. A source contact and a drain contact are coupled to the semiconductor core of the nanowire at respective exposed portions of the semiconductor core.