公开(公告)号：JP2011101047A

公开(公告)日：2011-05-19

申请号：JP2011015801

申请日：2011-01-27

Applicant: Nanosys Inc ,  ナノシス・インコーポレイテッドNanosys, Inc.

Inventor： DUAN XIANGFENG ,  NIU CHUNMING ,  EMPEDOCLES STEPHEN ,  ROMANO LINDA T ,  CHEN JIAN ,  SAHI VIJENDRA ,  BOCK LAWRENCE ,  STUMBO DAVID ,  PARCE J WALLACE ,  GOLDMAN JAY L

IPC: H01L29/06 ,  B82B1/00 ,  C01B31/02 ,  H01L21/00 ,  H01L21/331 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  H01L29/737 ,  H01L29/786 ,  H01L29/861 ,  H01L33/06 ,  H01L33/20 ,  H01L33/26 ,  H01L35/34 ,  H01L41/18 ,  H01L41/193 ,  H01L41/22 ,  H01L41/24 ,  H01L51/00 ,  H01L51/05 ,  H03H11/20

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  B82Y25/00 ,  H01F1/0072 ,  H01L27/1214 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78696 ,  H01L33/08 ,  H01L33/18 ,  H01L35/26 ,  H01L35/32 ,  H01L41/082 ,  H01L41/18 ,  H01L41/316 ,  H01L51/0012 ,  H01L51/0048 ,  H01L51/0504 ,  H01L51/0508 ,  H01L51/0545 ,  H01L51/0595 ,  Y02E10/549

Abstract: PROBLEM TO BE SOLVED: To provide a method and apparatus for obtaining an electronic substrate including a plurality of semiconductor devices. SOLUTION: A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed in the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-type doping nanowires and n-type doping nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for arranging nanowires on substrates, nanowire spraying techniques for forming nanowires as a film, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface levels in nanowires are described. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 解决的问题：提供一种用于获得包括多个半导体器件的电子衬底的方法和装置。 解决方案：在衬底上形成纳米线的薄膜。 纳米线的薄膜形成为具有足够的纳米线密度以达到工作电流水平。 在纳米线的薄膜中限定多个半导体区域。 在半导体器件区域中形成触点，从而提供与多个半导体器件的电连接。 此外，用于制造纳米线的各种材料，包括p型掺杂纳米线和n型掺杂纳米线的薄膜，纳米线异质结构，发光纳米线异质结构，用于在衬底上排列纳米线的流动掩模，用于形成纳米线作为膜的纳米线喷涂技术 用于减少或消除纳米线中的电子的声子散射，并且描述了用于降低纳米线中的表面水平的技术。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2015046600A

公开(公告)日：2015-03-12

申请号：JP2014184819

申请日：2014-09-11

Applicant: ナノシス・インク. ,  Nanosys Inc

Inventor： DUAN XIANGFENG ,  NIU CHUNMING ,  EMPEDOCLES STEPHEN ,  ROMANO LINDA T ,  CHEN JIAN ,  SAHI VIJENDRA ,  BOCK LAWRENCE ,  STUMBO DAVID ,  PARCE J WALLACE ,  GOLDMAN JAY L

IPC: H01L29/06 ,  B82Y30/00 ,  B82Y40/00 ,  C01B31/02 ,  H01L21/00 ,  H01L21/28 ,  H01L21/322 ,  H01L21/329 ,  H01L21/331 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  H01L29/737 ,  H01L29/786 ,  H01L29/861 ,  H01L29/868 ,  H01L29/872 ,  H01L31/0352 ,  H01L33/20 ,  H01L41/18 ,  H01L41/22 ,  H01L51/00 ,  H01L51/05 ,  H03H11/20

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  B82Y25/00 ,  H01F1/0072 ,  H01L27/1214 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78696 ,  H01L33/08 ,  H01L33/18 ,  H01L35/26 ,  H01L35/32 ,  H01L41/082 ,  H01L41/18 ,  H01L41/316 ,  H01L51/0012 ,  H01L51/0048 ,  H01L51/0504 ,  H01L51/0508 ,  H01L51/0545 ,  H01L51/0595 ,  Y02E10/549

Abstract: 【課題】複数の半導体デバイスを有する電子的な基板を得るための方法および装置を提供する。【解決手段】ナノワイヤ薄膜を、基板上に形成する。ナノワイヤ薄膜は、動作電流レベルを達成するのに十分なナノワイヤの密度を有するように形成する。複数の半導体領域を、ナノワイヤ薄膜に画定する。コンタクトを、半導体デバイス領域において形成し、それによって、電気的な接続を複数の半導体デバイスに提供する。【選択図】図3

Abstract translation: 要解决的问题：提供一种用于获得包括多个半导体器件的电子衬底的方法和设备。解决方案：在衬底上形成纳米线薄膜。 纳米线的薄膜形成为具有足够的纳米线密度以达到工作电流水平。 在纳米线的薄膜中限定多个半导体区域。 在半导体器件区域中形成触点，从而提供与多个半导体器件的电连接。

公开(公告)号：CA2572798A1

公开(公告)日：2006-07-27

申请号：CA2572798

申请日：2005-04-29

Applicant: NANOSYS INC

Inventor： HAMILTON JAMES M ,  PONTIS GEORGE ,  HEALD DAVID L ,  SCHER ERIK C ,  SAHI VIJENDRA ,  PAN YAOLING ,  EMPEDOCLES STEPHEN A ,  STUMBO DAVID P ,  DUBROW ROBERT S ,  DUAN XIANGFENG ,  WHITEFORD JEFFERY A ,  ROMANO LINDA T ,  CHEN JIAN ,  NIU CHUNMING ,  LEMMI FRANCESCO ,  GOLDMAN JAY L

IPC: H01L21/20

公开(公告)号：AU2004236260A1

公开(公告)日：2004-11-18

申请号：AU2004236260

申请日：2004-05-05

Applicant: NANOSYS INC

Inventor： HAMILTON JIM ,  MURPHY MATTHEW ,  ROMANO LINDA T ,  SCHER ERIK ,  DUBROW ROBERT ,  PARCE J WALLACE ,  GOLDMAN JAY ,  STUMBO DAVE ,  SAHI VIJENDRA ,  DANIELS HUGH ,  NIU CHUNMING ,  WHITEFORD JEFFERY A

IPC: B32B5/16 ,  C01B20060101 ,  C12N15/87 ,  D04H3/00 ,  D04H5/00 ,  D04H13/00 ,  H01J49/04

公开(公告)号：AU2005336130B2

公开(公告)日：2011-02-24

申请号：AU2005336130

申请日：2005-10-14

Applicant: NANOSYS INC

Inventor： MOSTARSHED SHAHRIAR ,  CHEN JIAN ,  ROMANO LINDA T ,  PAN YAOLING ,  LEON FRANCISCO

IPC: H01L29/775

Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate. A source contact and a drain contact are coupled to the semiconductor core of the nanowire at respective exposed portions of the semiconductor core.

公开(公告)号：CA2589432A1

公开(公告)日：2007-03-15

申请号：CA2589432

申请日：2005-10-14

Applicant: NANOSYS INC

Inventor： MOSTARSHED SHAHRIAR ,  ROMANO LINDA T ,  PAN YAOLING ,  CHEN JIAN ,  LEON FRANCISCO

IPC: H01L29/76

Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate. A source contact and a drain contact are coupled to the semiconductor core of the nanowire at respective exposed portions of the semiconductor core.

公开(公告)号：CA2564220A1

公开(公告)日：2005-12-15

申请号：CA2564220

申请日：2005-04-29

Applicant: NANOSYS INC

Inventor： NIU CHUNMING ,  MOSTARSHED SHAHRIAR ,  GOLDMAN JAY ,  DUAN XIANGFENG ,  DUBROW BOB ,  PAN YAOLING ,  ROMANO LINDA T ,  STUMBO DAVE

IPC: H01L21/20 ,  C01B31/02 ,  C30B11/12 ,  C30B29/60 ,  H01L21/425

Abstract: The present invention is directed to systems and methods for nanowire growth and harvesting. In an embodiment, methods for nanowire growth and doping are provided, including methods for epitaxial oriented nanowire growth using a combination of silicon precursors. In a further aspect of the invention, methods to improve nanowire quality through the use of sacrifical growth layers are provided. In another aspect of the invention, methods for transferring nanowires from one substrate to another substrate are provided.

公开(公告)号：AU2004276234A1

公开(公告)日：2005-04-07

申请号：AU2004276234

申请日：2004-09-15

Applicant: NANOSYS INC

Inventor： DUBROW ROBERT ,  ROMANO LINDA T ,  STUMBO DAVID

IPC: C30B7/00 ,  B82B20060101 ,  C30B21/02 ,  C30B28/06 ,  H01L21/20 ,  H01L21/36

Abstract: Methods and systems for depositing nanomaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanomaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation is optionally provided by moving the transfer and receiving substrates relative to each other during the transfer process.

公开(公告)号：CA2522872A1

公开(公告)日：2004-11-18

申请号：CA2522872

申请日：2004-05-05

Applicant: NANOSYS INC

Inventor： SAHI VIJENDRA ,  DUBROW ROBERT ,  GOLDMAN JAY ,  ROMANO LINDA T ,  NIU CHUNMING ,  DANIELS HUGH ,  PARCE J WALLACE ,  WHITEFORD JEFFERY A ,  MURPHY MATTHEW ,  SCHER ERIK ,  STUMBO DAVE ,  HAMILTON JIM

IPC: B32B5/16 ,  C01B20060101 ,  C12N15/87 ,  D04H3/00 ,  D04H5/00 ,  D04H13/00 ,  H01J49/04

Abstract: The invention provides novel nanofiber enhanced surface area substrates and structures comprising such substrates, as well as methods and uses for such substrates.

公开(公告)号：AU2003283973A1

公开(公告)日：2004-04-23

申请号：AU2003283973

申请日：2003-09-30

Applicant: NANOSYS INC

Inventor： EMPEDOCLES STEPHEN ,  ROMANO LINDA T ,  CHEN JIAN ,  SAHI VIJENDRA ,  BOCK LAWRENCE ,  STUMBO DAVID ,  PARCE J WALLACE ,  GOLDMAN JAY L ,  DUAN XIANGFENG ,  NIU CHUNMING

IPC: C01B31/02 ,  H01L21/00 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  H01L29/06 ,  H01L29/786 ,  H01L33/20 ,  H01L41/18 ,  H01L41/22 ,  H01L51/00 ,  H01L51/05 ,  H03H11/20

Abstract: A method and apparatus for an electronic substrate (1920) having a plurality of semiconductor devices is described. A thin film of nanowires (1910) is formed on a substrate. The thin film of nanowires (1910) is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions is defined in the thin film of nanowires. Contacts (1902) are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.