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公开(公告)号：JPH08190628A
公开(公告)日：1996-07-23
申请号：JP20877595
申请日：1995-08-16
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： PENNINO LAURA , MANCUSO MASSIMO , TRAVAGLIA FEDERICO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
Abstract: PROBLEM TO BE SOLVED: To perform an excellent noise reduction operation while preserving useful high-pass (high band) information. SOLUTION: This device is provided with an interface 1 for obtaining the gray levels of the pixel to be processed of images and the adjacent pixel, a difference circuit 2 for generating the difference of the gray levels of the pixel to be processed and the adjacent pixel, a fuzzy flat area smoothing circuit 8 for performing the low-pass (low band) smoothing of an almost uniform area stipulated by the pixel and the adjacent pixel, an edge preservation smoothing circuit 9 for performing a low-pass filtering processing to a high frequency information area stipulated by the pixel and the adjacent pixel, an area voter circuit 4 for supplying a measurement value for examining whether or not the area stipulated by the pixel and the adjacent pixel is almost uniform and a soft switching circuit 10 for weighting the output of the smoothing circuits 8 and 9 based on the measurement value.
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公开(公告)号：JPH08102873A
公开(公告)日：1996-04-16
申请号：JP10261495
申请日：1995-04-26
Applicant: CONS RIC MICROELETTRONICA , ST MICROELECTRONICS SRL
Inventor： MANCUSO MASSIMO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
Abstract: PURPOSE: To reduce noise of a television signal and also perform simultaneous scan conversion by including a noise reducing circuit and a simultaneous scan conversion circuit of a TV signal. CONSTITUTION: A filter archtecture is provided with at least one filter 3 which has plural digital inputs Pi and X that receive television signal elements through an interface and also has a few outputs NR and includes at least one interpolating block which takes a result of a filtering operation for noise that is associated with a television signal by the outputs NR, is connected to an input in the filter 3, also operates in fuzzy theory and executes scan conversion of a television signal that should be presented to other outputs SRC of the filter 3.
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公开(公告)号：DE69433225D1
公开(公告)日：2003-11-13
申请号：DE69433225
申请日：1994-04-27
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： MANCUSO MASSIMO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
Abstract: A television signal scanning conversion device of the type comprising at least one filtering block (3) having a plurality of digital inputs (Pi, X) which receive through an interface (2) components (X, Pi) of an interlaced television signal comprises also at least one calculation block (CALC1) connected to the signal inputs and operating with fuzzy logic. Said calculation block is capable of executing a switch between at least two different interpolation procedures, to wit interfield and intrafield.
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公开(公告)号：DE69328251T2
公开(公告)日：2000-08-10
申请号：DE69328251
申请日：1993-11-30
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： MANCUSO MASSIMO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
IPC: G06T5/00
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公开(公告)号：DE69313837T2
公开(公告)日：1998-04-09
申请号：DE69313837
申请日：1993-06-09
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： RUSSO BIAGIO , POLUZZI RINALDO , LUZZI CLAUDIO
Abstract: A method for setting up the memory of an electronic controller operates in Fuzzy logic, whereby predetermined membership functions (f(m)) of logic variables (M), defined within a universe of discourse (U) sampled in a finite number of points (m), are subjected to inference operations basically configured by IF/THEN rules with at least one front preposition and at least one rear implication. The controller further comprises a central control unit (3) provided with a memory section (5) for storing predetermined values (l) of the membership functions (f(m)) which appear in the front or IF part of the Fuzzy rules and have a predetermined degree of truth or membership (G). This method provides for storing into said memory section (5) the only values (l) of those membership functions (f(m)) which have a value (l) of the degree of membership (G) other than zero at the points (m) of the universe of discourse (U).
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Patent Agency Ranking
公开(公告)号：DE69528351D1
公开(公告)日：2002-10-31
申请号：DE69528351
申请日：1995-04-28
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： BRUNO DARIO , POLUZZI RINALDO , MANARESI NICOLO , FRANCHI ELEONORA
Abstract: The analog processor of this invention is programmable and capable of storing the processing coefficients in analog form. It comprises a storage section (MEM) having at least one output, plural outputs in most cases, and being adapted to respectively generate programming signals (PP) on such outputs; the storage section (MEM) is input a plurality of supply voltage signals (VI) and is operative to produce, in connection with information stored therein, one of the supply voltage signals on each of the outputs, it being understood that one voltage signal may be produced on several such outputs. Advantageously, the processor can also be programmed in a simple manner from circuits of the digital type if switches (SW) controlled by storage elements (E) are used in the storage section (MEM).
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公开(公告)号：DE69522313D1
公开(公告)日：2001-09-27
申请号：DE69522313
申请日：1995-04-28
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： BRUNO DARIO , POLUZZI RINALDO , MANARESI NICOLO , FRANCHI ELEONORA
Abstract: The analog processor of this invention can carry out processings independently of the operating temperature and process parameters, in a reliable manner and at high performance levels using fairly simple circuitry. To achieve this independence, the processor is basically implemented and integrated with MOS transistors, has both voltage inputs (AI) and outputs (OUT), and includes a biasing section (BIAS) which supplies voltage bias signals (VG), of which at least one is substantially the sum of a voltage proportional to the threshold voltage of the MOS transistors and a reference voltage. This reference voltage can be extracted from a reference potential which is stable to temperature and process parameters, for example that produced by a bandgap type of generator. A major feature of the processor according to the invention is the linearity of its input-output characteristic relative to that reference voltage. It follows that it may be advantageous to extract that reference voltage by division from a signal indicating the width of the input signal variation range, thereby to achieve compensation for or independence of variations of this range.
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公开(公告)号：DE69328251D1
公开(公告)日：2000-05-04
申请号：DE69328251
申请日：1993-11-30
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： MANCUSO MASSIMO , POLUZZI RINALDO , RIZZOTTO GIANGUIDO
IPC: G06T5/00
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公开(公告)号：DE69313837D1
公开(公告)日：1997-10-16
申请号：DE69313837
申请日：1993-06-09
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： RUSSO BIAGIO , POLUZZI RINALDO , LUZZI CLAUDIO
Abstract: A method for setting up the memory of an electronic controller operates in Fuzzy logic, whereby predetermined membership functions (f(m)) of logic variables (M), defined within a universe of discourse (U) sampled in a finite number of points (m), are subjected to inference operations basically configured by IF/THEN rules with at least one front preposition and at least one rear implication. The controller further comprises a central control unit (3) provided with a memory section (5) for storing predetermined values (l) of the membership functions (f(m)) which appear in the front or IF part of the Fuzzy rules and have a predetermined degree of truth or membership (G). This method provides for storing into said memory section (5) the only values (l) of those membership functions (f(m)) which have a value (l) of the degree of membership (G) other than zero at the points (m) of the universe of discourse (U).
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公开(公告)号：DE69522313T2
公开(公告)日：2002-04-18
申请号：DE69522313
申请日：1995-04-28
Applicant: ST MICROELECTRONICS SRL , CONS RIC MICROELETTRONICA
Inventor： BRUNO DARIO , POLUZZI RINALDO , MANARESI NICOLO , FRANCHI ELEONORA
Abstract: The analog processor of this invention can carry out processings independently of the operating temperature and process parameters, in a reliable manner and at high performance levels using fairly simple circuitry. To achieve this independence, the processor is basically implemented and integrated with MOS transistors, has both voltage inputs (AI) and outputs (OUT), and includes a biasing section (BIAS) which supplies voltage bias signals (VG), of which at least one is substantially the sum of a voltage proportional to the threshold voltage of the MOS transistors and a reference voltage. This reference voltage can be extracted from a reference potential which is stable to temperature and process parameters, for example that produced by a bandgap type of generator. A major feature of the processor according to the invention is the linearity of its input-output characteristic relative to that reference voltage. It follows that it may be advantageous to extract that reference voltage by division from a signal indicating the width of the input signal variation range, thereby to achieve compensation for or independence of variations of this range.
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