High precision current mirror for low voltage supply
    11.
    发明公开
    High precision current mirror for low voltage supply 失效
    Hochgenauer Stromspiegelfürniedrige Versorgungsspannung

    公开(公告)号:EP0715239A1

    公开(公告)日:1996-06-05

    申请号:EP94830555.2

    申请日:1994-11-30

    CPC classification number: G05F3/265 G05F3/262

    Abstract: A high-precision current generating circuit (1), particularly intended for a low-impedance circuit user, comprises a current mirror formed by a first (M1) and a second (M2) transistor of the MOS type, and a voltage regulator (4) having two terminals respectively connected to the drain terminals (D1,D2) of the two transistors (M1,M2) to maintain equal values of drain-source voltage (Vds1 and Vds2) on said transistors.

    Abstract translation: 特别是用于低阻抗电路用户的高精度电流产生电路(1)包括由MOS型的第一(M1)和第二(M2)晶体管形成的电流镜和电压调节器(4) )具有分别连接到两个晶体管(M1,M2)的漏极端子(D1,D2)的两个端子,以在所述晶体管上保持漏 - 源电压(Vds1和Vds2)的相等值。

    Device for processing servo signals in a parallel architecture PRML reading apparatus for hard disks
    12.
    发明公开
    Device for processing servo signals in a parallel architecture PRML reading apparatus for hard disks 失效
    一种在读取装置为硬盘执行的并行处理体系结构的伺服信号的设备。

    公开(公告)号:EP0684608A1

    公开(公告)日:1995-11-29

    申请号:EP94830235.1

    申请日:1994-05-23

    CPC classification number: G11B20/10009 G11B21/106

    Abstract: The device is to be used with a parallel architecture PRML reading apparatus comprising a variable-gain input amplifier (21), a low-pass analog filter (22), a transversal analog filter (23) and two distinct and parallel processing channels (24, 34) interposed between the transversal analog filter (23) and an RLL-NRZ decoder (25). The two processing channels (24, 34) comprise respective analog-digital converters (26, 36) and respective Viterbi detectors (27, 37) and operate according to sampling sequences that alternate with one another. The device (30) for processing the servo signals comprises a rectifier (31) connected to the outputs of said analog-digital converters (26, 36) and an integrator (32).

    Abstract translation: 该装置是用一个并行架构PRML读取装置,包括一个可变增益输入放大器(21),一个低通模拟滤波器(22),横向模拟滤波器(23)和两个不同的和并行处理通道(24中使用 ,34)横向模拟滤波器(23)和解码器,以RLL NRZ(25之间)。 所述两个处理通道(24,34)包括respectivement模拟 - 数字转换器(26,36)和相应的Viterbi检测(27,37)和操作根据采样序列并彼此交替。 用于处理所述伺服信号的装置(30)包括连接到所述模拟 - 数字转换器的输出(26,36),并在积分器(32)的整流器(31)。

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