公开(公告)号：JPH11103070A

公开(公告)日：1999-04-13

申请号：JP12528398

申请日：1998-04-20

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: H01L29/786 ,  H01L21/336

Abstract: PROBLEM TO BE SOLVED: To ensure reliability for a long time by improving an insulating layer included in a thin film transistor. SOLUTION: A thin film transistor has a laminated structure including a semiconductor film 5, a gate oxide film 3 formed on the bottom surface of the semiconductor film 5, an etching stopper film 6 formed on the top surface of the semiconductor film 5, and a gate electrode 1 just under the semiconductor film 5 via the gate oxide film 3, and is formed on an insulating substrate 0 at a process temperature under 60 deg.C. The semiconductor film 5 includes an active layer comprising non-single crystalline silicon. The gate oxide film 3 constituting a lower insulating layer comprises SiO2 generated by the dissolution of inorganic silane compounds and is made dense by laser annealing. The etching stopper film 6 constituting an upper insulating layer comprises SiO2 generated by the dissolution of organic saline compounds and has a dense composition. It is possible to make the gate oxide film 3 and the etching stopper film 6 dense at the same time by employing a rapid heating method when impurities implanted into the semiconductor thin film are activated.

公开(公告)号：JPH1117190A

公开(公告)日：1999-01-22

申请号：JP17899297

申请日：1997-06-19

Applicant: SONY CORP

Inventor： KUNII MASABUMI ,  SHIMOGAICHI YASUSHI

IPC: H01L21/20 ,  H01L21/02 ,  H01L21/268 ,  H01L21/336 ,  H01L27/12 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To crystallize uniformly a semiconductor thin film constituting the active layer of a thin film transistor, by projecting a laser beam on it. SOLUTION: A thin film transistor has the laminated structure including a polycrystal semiconductor thin film 5, a gate oxide film 3 formed contacting it with the one-surface side of the film 5, and a gate electrode 1 superimposed on the polycrystal semiconductor thin film 5 via the gate oxide film 3. The thin film transistor is formed on an insulation substrate 0 at a process temperature not higher than 600 deg.C. Projecting on an amorphous semiconductor thin film 4 formed previously a laser beam 50 excited impulsively and shaped sectionally in the form of a rectangle, the film 4 is converted into the polycrystal semiconductor thin film 5. In this case, the laser beam 50 with its pulse duration exceeding about 25 ns is projected on the same place at a lower frequency than five shots.

公开(公告)号：JPH09230385A

公开(公告)日：1997-09-05

申请号：JP6207396

申请日：1996-02-23

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: G02F1/1343 ,  G02F1/133 ,  G02F1/136 ,  G02F1/1368 ,  G09G3/36

Abstract: PROBLEM TO BE SOLVED: To make it possible to repair the defect of switching elements having a multigate structure. SOLUTION: This active matrix display device has a panel structure consisting of a pair of driving substrates and a counter substrate joined to each other via spacings and liquid crystals held in these spacings. Gate lines 1 and signal lines 2 intersected with each other, the switching elements 3 disposed in the intersected parts of both and pixel electrodes 4 driven by these switching elements 3 are formed on the driving substrates. Counter electrodes facing the pixel electrodes 4 are formed on the counter substrate. Each switching element 3 consists of two pieces of thin-film transistors(TFTs) 3a, 3b connected in series between the signal lines 2 and the pixel electrodes 4. The junctures 8a of the adjacent TFTs 3a, 3b are provided with repair regions 7 for repairing the defect which electrical short the pixel electrodes 4 corresponding to these junctures. Even if the one TFT 3b goes out of order, the driving of the pixel electrode 4 by using only the other TFT 3a is made possible by such constitution.

公开(公告)号：JPH09153622A

公开(公告)日：1997-06-10

申请号：JP33577095

申请日：1995-11-30

Applicant: SONY CORP

Inventor： FUJINO MASAHIRO ,  KUNII MASABUMI ,  SHIMOGAICHI YASUSHI

IPC: G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To prevent faults by providing redundancy to wiring of a thin-film semiconductor device. SOLUTION: A thin film transistor 2, having a source area S and a drain area D, is integrated on an insulated substrate 1. The thin film transistor 2 is electrically connected by a plurality of wires including a signal wire 6 and a gate wire 3. A plurality of conductive layers assigned to the respective wires 3, 6 and the source area S/drain area D are electrically separated from each other via inter-layer insulated films 4 and 7. The signal wire 6 has a multiple structure utilizing a plurality of conductive layers at an intersection with the gate wire 3. The multiple structure comprises a main conductive layer of a metal film assigned to the signal wire 6 and a sub conductive layer basically assigned to another wire than the signal wire 6. The sub conductive layer comprises a semiconductive film 5 which belongs to the same layer of the source area S/drain area D. the main conductive layer and the sub conductive layer are inter-connected via contact holes 8 formed through the inter-layer insulated film 7 between these layers. Thus, a desired redundancy is obtained in the wiring.

公开(公告)号：JPH0823105A

公开(公告)日：1996-01-23

申请号：JP25761694

申请日：1994-09-27

Applicant: SONY CORP

Inventor： INO MASUMITSU ,  HAYASHI HISAO ,  KUNII MASABUMI ,  URAZONO TAKENOBU ,  NISHIHARA SHIZUO ,  MINEGISHI MASAHIRO

IPC: G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/02 ,  H01L21/20 ,  H01L21/265 ,  H01L21/268 ,  H01L21/336 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

Abstract: PURPOSE:To improve the efficiency of laser irradiation, by irradiating an area with a laser pulse in one-shot processing to carry out one-shot heating of a semiconductor thin film for one chip. CONSTITUTION:A semiconductor thin film 2 is formed on an insulating substrate 1, and then a series of processings including heating of the semiconductor thin film 2 is carried out, thus integrating thin film transistors in an area 3 for one chip. Finally, pixel electrodes for one frame is formed in a matrix array 4, thus completing a semiconductor chip 7 for display. In the processing, the pre-set area 3 is irradiated with a laser pulse 8 in one shot to carry out one-shot heating of the semiconductor thin film 2 for one chip. Thus, the time for laser irradiation is shortened, enabling mass production. Also, as the one-shot heating produces crystal of high uniformity, the process conditions are stabilized and the uniformity of electrical properties of the thin film transistor is secured. Also, in the laser irradiation, impurities are activated by one-shot heating after implanting the impurities into the semiconductor film 2.

公开(公告)号：JP2009271369A

公开(公告)日：2009-11-19

申请号：JP2008122453

申请日：2008-05-08

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KUNII MASABUMI ,  YAMANAKA TAKESHI

IPC: G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1368

CPC classification number: G02F1/13318

Abstract: PROBLEM TO BE SOLVED: To improve the sensitivity of a photosensor element as a position sensor element integrated in a panel of a liquid crystal display device.
SOLUTION: One pixel area of an in-plane switching liquid crystal display panel is divided into a display area TA and a sensor area RA, a V-shaped pixel electrode 62a inclined relative to x-direction and y-direction in which a plurality of pixels P is aligned is disposed in the display area TA, sensor driving wires H1 and H2 are disposed to be laid along the shape of the pixel electrode 62a, and a light-receiving surface JSa of a photosensor element is formed between H1 and H2, whereby the area of the light-receiving surface JSa is increased.
COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提高作为集成在液晶显示装置的面板中的位置传感器元件的光传感器元件的灵敏度。 解决方案：面内切换液晶显示面板的一个像素区域分为显示区域TA和传感器区域RA，相对于x方向和y方向倾斜的V形像素电极62a，其中 在显示区域TA中设置多个像素P，传感器驱动线H1和H2被布置成沿着像素电极62a的形状放置，并且在H1之间形成光电传感元件的受光面JSa 和H2，由此光接收表面JSa的面积增加。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2007047808A

公开(公告)日：2007-02-22

申请号：JP2006244985

申请日：2006-09-11

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KUNII MASABUMI

IPC: G02F1/1368 ,  H01L21/20 ,  H01L21/268 ,  H01L21/3205 ,  H01L21/336 ,  H01L23/52 ,  H01L29/786

CPC classification number: G02F1/136286

Abstract: PROBLEM TO BE SOLVED: To achieve a uniform and optimum recrystallization process by laser annealing on a semiconductor thin film as an active layer of a thin film transistor and to reduce resistance of gate wiring. SOLUTION: A display arrangement is configured in such a manner that gate wiring 6 connecting a gate electrode 1 of each thin film transistor 4 intersects signal wiring 7 connecting a source electrode S of each thin film transistor 4 on an insulating substrate. The gate wiring 6 is divided into an integrated part 6a formed as integrated with an individual gate electrode 1 and a separated part 6b connecting the integrated parts. The gate electrode 1 has a thermal conductivity lower than that of the separated part 6b of the gate wiring 6, while the separated part 6b of the gate wiring 6 has an electric resistance lower than that of the gate electrode 1. The signal wiring 7 intersects the integrated part 6a of the gate wiring 6 via an insulating film 14. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：通过激光退火对作为薄膜晶体管的有源层的半导体薄膜进行均匀且最佳的再结晶处理并降低栅极布线的电阻。 解决方案：显示装置被构造成使得连接每个薄膜晶体管4的栅极电极1的栅极布线6与连接绝缘基板上的每个薄膜晶体管4的源电极S的信号布线7相交。 栅极布线6被分成与单个栅电极1形成为一体的集成部分6a和连接这些集成部分的分离部分6b。 栅极电极1的导热率低于栅极布线6的分离部分6b的导热率，而栅极布线6的分离部分6b的电阻低于栅极电极1的电阻。信号布线7与 绝缘膜14的栅极配线6的集成部分6a。（C）2007，JPO＆INPIT

公开(公告)号：JP2006049535A

公开(公告)日：2006-02-16

申请号：JP2004227470

申请日：2004-08-04

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KUNII MASABUMI

IPC: H01L29/786 ,  H01L21/20 ,  H01L21/316 ,  H01L21/336

CPC classification number: H01L27/12 ,  H01L27/1248

Abstract: PROBLEM TO BE SOLVED: To provide the manufacturing method of a thin film transistor and a thin film transistor, capable of ensuring threshold voltage irrespective of its conductivity type, even when processing a semiconductor thin film by water vapor annealing. SOLUTION: TFTs 40, 43 are formed on a substrate 31, and in a state where they are covered an interlayer insulating film 44 not containing a hydroxyl group in a film constituting at least a lowermost layer is formed. Thereafter, oxygen or hydrogen is bonded to a dangling bond of a semiconductor thin film 34 constituting the TFT 40, 43 by subjecting the resulting structure to heat treatment in a water atmosphere, and the interlayer insulating film 44 is made to be dense. The interlayer insulating film 44 comprises silicon nitride for example. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：即使在通过水蒸汽退火处理半导体薄膜时，提供能够确保阈值电压而不管其导电类型如何的薄膜晶体管和薄膜晶体管的制造方法。 解决方案：在基板31上形成TFT40,43，并且在其被覆盖的状态下，形成至少构成至少最下层的膜中不含羟基的层间绝缘膜44。 此后，通过使所得结构在水气氛中进行热处理，将氧或氢键合到构成TFT40,43的半导体薄膜34的悬挂键，并使层间绝缘膜44致密。 层间绝缘膜44例如包括氮化硅。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005108931A

公开(公告)日：2005-04-21

申请号：JP2003336940

申请日：2003-09-29

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KUNII MASABUMI

IPC: G02F1/1368 ,  H01L21/336 ,  H01L29/786 ,  H01L51/50 ,  H05B33/14

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a display for forming a drive circuit in a CMOS configuration uniformly within surface, using a laminated TFT which uses a polycrystalline semiconductor. SOLUTION: After forming a gate electrode 32 and a gate insulating film on a substrate 12, an active layer 34 made of a polycrystalline semiconductor film is formed by a reactive thermal CVD method. A p-type source/drain layer 37 is allowed to remain only at a p-type TFT region 12p by the reactive thermal CVD method via an etching stopper layer 35a, in a shape of the gate electrode 32 of a p-type TFT region 12n and a p-type TFT region 12p, and further the active layer 34 is patterned into an island shape. An n-type source/drain layer 40 is film-formed by the reactive thermal CVD method via an etching stopper layer 35a in a shape of the gate electrode 32 of the n-type TFT region 12n. The p-type/n-type source/drain layers 37, 40 are patterned to form p-type/n-type source/drains 37a, 37b, 40a, 40b. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种使用使用多晶半导体的层压TFT来制造在CMOS结构中均匀地形成CMOS配置的驱动电路的显示器的方法。 解决方案：在基板12上形成栅极32和栅极绝缘膜之后，通过反应热CVD法形成由多晶半导体膜制成的有源层34。 通过反应热CVD方法，通过蚀刻停止层35a将p型源极/漏极层37保持在p型TFT区域12p处，形成为p型TFT区域的栅极32的形状 12n和p型TFT区域12p，并且还将有源层34图案化为岛状。 通过反应热CVD法，通过n型TFT区域12n的栅极32的形状的蚀刻停止层35a，形成n型源极/漏极层40。 图案化p型/ n型源极/漏极层37,40以形成p型/ n型源极/漏极37a，37b，40a，40b。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2002261290A

公开(公告)日：2002-09-13

申请号：JP2001056206

申请日：2001-03-01

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: G02F1/1368 ,  G09F9/30 ,  H01L21/20 ,  H01L21/336 ,  H01L29/786 ,  H01L51/50 ,  H05B33/14 ,  H05B33/26

Abstract: PROBLEM TO BE SOLVED: To form a polycrystalline semiconductor thin film that maintains an ideal MOS structure interface and at the same time, has a large particle size, and to manufacture a high-performance thin-film transistor by the polycrystalline semiconductor thin film. SOLUTION: This manufacturing method of the thin-film transistor includes a film formation process for forming the semiconductor thin film 5 of a non-single crystal on an insulating substrate 0, a thermal oxidation process for generating an oxide film 3, by allowing the surface of the semiconductor thin film 5 to be subjected to thermal oxidation under 3 pressurized atmosphere containing gas having oxidation capability, and a crystallization process for converting the non-single crystal to a polycrystalline in the semiconductor thin film 5 by applying an energy beam to the semiconductor thin film 5 via the oxide film 3. The energy beam is applied across the oxide film 3, thus forming the flat interface between the semiconductor thin film 3 and oxide film 3. Also, the surface of the semiconductor thin film 5 is subjected to thermal oxidation under the pressurized atmosphere, containing the gas having the oxidation capability, thus nearly discharging hydrogen remaining on the semiconductor thin film 5 by heating. Since nearly no hydrogen remains on the semiconductor thin film 5 at a stage where the energy beam is applied across the oxide film 3, there is no risk of bumping.