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    BBD
    13.
    发明专利
    BBD 失效

    公开(公告)号：JPS5680888A

    公开(公告)日：1981-07-02

    申请号：JP15663379

    申请日：1979-12-03

    Applicant: SONY CORP

    Inventor： TSUCHIYA TAKAHISA ,  SONEDA MITSUO ,  NAKAMURA ISA

    IPC: G11C27/04 ,  G11C19/18 ,  H01L21/339 ,  H01L29/762

    Abstract: PURPOSE:To make small the relative interference and make large the dynamic range of the signal by obtaining the clock fed respectively to an electric charge controlling active element and a cold end side of memory capacity from a different generating circuit. CONSTITUTION:Bases of the transistors Q1-Q2n are separated from cold end sides of the capacitors C0-Q2n and bases of Q1, Q3,..., Q2n-1 are connected through a terminal 7a, and bases of Q2, Q4,... Q2n are connected through a terminal 6a, to a clock generating circuit 8a. The cold end sides of C1, C3,..., C2n-1 are connected through a terminal 7b, and cold end sides of C0, C2,..., C2n are connected through a terminal 6b, to a clock signal generating circuit 8b. To the output terminals 6a, 7a and 6b, 7b of the circuits 8a, 8b, clocks phi1a, phi2a and phi1b, phi2b of duty ratio 50% and reserve polarity are respectively output and an input signal of the terminal 1 synchronizes with these clocks and moves.

    SWITCHING CIRCUIT FOR CHARGE TRANSFER ELEMENT
    14.
    发明专利
    SWITCHING CIRCUIT FOR CHARGE TRANSFER ELEMENT 失效

    公开(公告)号：JPS5661095A

    公开(公告)日：1981-05-26

    申请号：JP13810679

    申请日：1979-10-25

    Applicant: SONY CORP

    Inventor： TSUCHIYA TAKAHISA ,  SONEDA MITSUO ,  NAKAMURA ISA

    IPC: G11C27/04 ,  G11C27/00 ,  H01L21/339 ,  H01L29/76 ,  H01L29/762

    Abstract: PURPOSE:To perform switching of signal with a simple constitution, by respectively coupling the end of a plurality of BBDs with switching elements. CONSTITUTION:A power supply terminal 4 is connected to the hot end side of capacitors C2n-1, C'2m-1 immediately before each final stage of a plurality of charge transfer elements BBD1, BBD2 via switching elements 11, 12, and a signal is selectively picked up from BBD1, BBD2 and fed to BBD3 by controlling the switching elements with the output of a control voltage generating circuit 15.

    SIGNAL PROCESSING CIRCUIT FOR CHARGE TRANSFER ELEMENT
    15.
    发明专利
    SIGNAL PROCESSING CIRCUIT FOR CHARGE TRANSFER ELEMENT 失效

    公开(公告)号：JPS56160067A

    公开(公告)日：1981-12-09

    申请号：JP5260580

    申请日：1980-04-21

    Applicant: SONY CORP

    Inventor： TSUCHIYA TAKAHISA ,  SONEDA MITSUO ,  NAKAMURA ISA

    IPC: G11C27/04 ,  G11C19/18 ,  H01L21/339 ,  H01L29/762 ,  H03H15/02

    Abstract: PURPOSE:To satisfactorily process the signals in a simple construction by a method wherein differences in the speeds in a current mirror circuit are corrected, in the signal processing circuit adapted to mix up a plurality of signals respectively through the current mirror circuit. CONSTITUTION:In BBD comprising a transistor (Tr) having an input terminal 1, clock terminals 6, 7, NPN type Tr.Q1, Q2... and capacitors C0, C1..., the plurality of the signals are taken out, being mixed up through the current mirror circuit and signal-processed. The current mirror circuit M1 with the P type elements is formed by connecting a collector of the Tr.11 with a base of the PNP type Tr.21, an emitter of the Tr.21 with a collector and base of the PNP type Tr.22, a base of the Tr.23 with a base of the Tr.22, a collector of the Tr.23 with the collector of the Tr.11, and emitters of the Tr.22, 23 with a source terminal 4. In addition, the collector of the Tr.21 is connected to a hot end side of the capacitor C1.

    CONNECTION CIRCUIT FOR CHARGE TRANSFER ELEMENT
    16.
    发明专利
    CONNECTION CIRCUIT FOR CHARGE TRANSFER ELEMENT 失效

    公开(公告)号：JPS56130898A

    公开(公告)日：1981-10-14

    申请号：JP3513480

    申请日：1980-03-19

    Applicant: SONY CORP

    Inventor： TSUCHIYA TAKAHISA ,  SONEDA MITSUO ,  NAKAMURA ISA ,  TOKUHARA MASAHARU ,  KITA HIROYUKI

    IPC: G11C27/04 ,  G11C19/18 ,  H01L21/339 ,  H01L21/822 ,  H01L27/04 ,  H01L29/762 ,  H03H11/26 ,  H03H15/02 ,  H04N5/30

    Abstract: PURPOSE:To prevent the decrease in the dynamic range with a simple constitution, by selecting the coefficient of split of capacitor forming BBD so that the specified conditions can be satisfied and the DC level of the 1st and 2nd BBDs connected each other is made in agreement. CONSTITUTION:Capacitors C0' ,C0'', C1', C1'', C4', C4'', C5', C5''... forming BBDa split with coefficients a0, a1, a4, a5...' and the capacitors Cb0' and Cb0'' of BBDb connected to BBDa via the connection circuit 9 are split with the coefficient b. When the coefficients a0...'b are selected so that the conditions of equation I can be satisfied, the DC level on and after the capacitor Cb2 of BBDb to which the output of BBDa is fed is corrected and the DC level of BDDa and BBDb is in agreement. Thus, with a simple constitution, the decrease in the dynamic range can be prevented and no signal deterioration like waveform distortion can not be generated.

    OUTPUT CIRCUIT FOR CHARGE TRANSFER ELEMENT
    17.
    发明专利
    OUTPUT CIRCUIT FOR CHARGE TRANSFER ELEMENT 失效

    公开(公告)号：JPS5687296A

    公开(公告)日：1981-07-15

    申请号：JP16532879

    申请日：1979-12-18

    Applicant: SONY CORP

    Inventor： TSUCHIYA TAKAHISA ,  SONEDA MITSUO ,  NAKAMURA ISA ,  KITA HIROYUKI ,  TOKUHARA MASAHARU

    IPC: H03H15/02 ,  G11C27/00 ,  G11C27/04 ,  H03H15/00

    Abstract: PURPOSE:To simplify the circuit constitution and obtain an output having a good property, by extracting the signals obtained from the adjacent capacities in the different clock signal periods and then holding the peak value of the extracted signal to obtain an output. CONSTITUTION:With supply of clock pulses phi1 and phi2 to BBD, a high signal is extracted at the connection point of the emitters of transistors 31 and 32. This signal is supplied to the capacitor 38 through the transistors 33 and 36. The transistor 36 is turned on at the signal part of the signal which is supplied to the base of the transistor 36, and this potential is held. At the same time, the transistor 36 receives an adverse bias at the high potential part. The signal held is delivered to the output terminal 41 through the transistor 39.

    DRIVING METHOD OF CHARGE TRANSFER ELEMENT
    19.
    发明专利
    DRIVING METHOD OF CHARGE TRANSFER ELEMENT 失效

    公开(公告)号：JPS576496A

    公开(公告)日：1982-01-13

    申请号：JP8053480

    申请日：1980-06-13

    Applicant: SONY CORP

    Inventor： TSUCHIYA TAKAHISA ,  SONEDA MITSUO ,  NAKAMURA ISA

    IPC: G11C27/04 ,  G11C19/18 ,  H03H15/02

    Abstract: PURPOSE:To get rid of a DC potential variation occurring before and after a feedback point, so that a dynamic range is not deteriorated, by driving the first stage capacitor of plural charge transfer elements which have been provided in parallel, by the same clock signal. CONSTITUTION:Between a diode 24 and a transistor TR25 are connected the hot- end side of a capacitor 27 and TR28, and between base and collector of the TR28 is connected a capacitor 29. The cold-end side of the capacitor 27 is connected to a signal terminal 6 of a clock generating circuit 8, and the base the TR28 is connected to the same terminal 7. That is to say, in this circuit, a BBD constituting a DC correcting circuit is amplified by one stage, and a clock signal to be provided to the first stage capacitor 27 is made to coincide with a clock signal phi1 to be provided to the first stage capacitor C0 of the BBD. Accordingly, each Dc potential of BBD coincides entirely, and a DC potential variation before and after a feedback point, namely, between taps T1, T2 does not occur at all.

    OUTPUT CIRCUIT FOR CHARGE TRANSFER ELEMENT
    20.
    发明专利
    OUTPUT CIRCUIT FOR CHARGE TRANSFER ELEMENT 失效

    公开(公告)号：JPS56160069A

    公开(公告)日：1981-12-09

    申请号：JP6095980

    申请日：1980-05-08

    Applicant: SONY CORP

    Inventor： TSUCHIYA TAKAHISA ,  SONEDA MITSUO ,  NAKAMURA ISA ,  TOKUHARA MASAHARU ,  KITA HIROYUKI

    IPC: G11C27/04 ,  H01L21/339 ,  H01L29/762 ,  H01L29/768

    Abstract: PURPOSE:To remove the influences of a floating capacity and a current-amplification factor by a method wherein a sensitivity coefficient of the output circuit of the charge transfer element is changed in magnification depending on the suspension capacity, the current-amplification factor and the ratio of division. CONSTITUTION:The capacity at an arbitraily selected step of the charge transfer element is divided in the ratio proportional to a desired sensitive coefficient, clock signals being fed to coldend sides of the divided capacities, and also, the sensitivity coefficient is taken as shown by the formula at the right, in the output circuit of the charge transfer element adapted to obtain the output which the charge flowing in the capacity on one side is detected and weighted by the desired sensitivity coefficient. A signal level fall caused by the floating capacity is compensated by the term (C+Cs)/C, a base earth current-amplification factor of a detection transistor is compensated by the term 1/alpha and the output signal level of the BBD-constructed transistor is adjusted by the term (1/alpha') .

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