公开(公告)号：FR2788869B1

公开(公告)日：2001-04-13

申请号：FR9900770

申请日：1999-01-25

Applicant: ST MICROELECTRONICS SA

Inventor： CAMBONIE JOEL ,  MAZZONI SIMONE

IPC: G06F17/14

公开(公告)号：FR2794921A1

公开(公告)日：2000-12-15

申请号：FR9907495

申请日：1999-06-14

Applicant: ST MICROELECTRONICS SA

Inventor： CAMBONIE JOEL ,  MEJEAN PHILIPPE ,  BARTHEL DOMINIQUE ,  LIENARD JOEL

IPC: H04L27/00 ,  G06T1/60 ,  H04J11/00 ,  H04L1/00 ,  H04L27/26 ,  H04L27/32

Abstract: A sequential development of exit N samples (Ck) and their sequential delivery in a natural order (k) is obtained from a second addressing sequence containing natural and reversed orders. The phase of subsequent processing of the symbol auxiliary sequence (UK) temporally overlaps with respective phases of corresponding processing of the previous (UK-i) and the next symbol (UK+i). The addressing of the two memorials is successively and performed alternately according to the first and the second addresses sequence. An Independent claim is included for: (a) a device for transforming two groups of samples

公开(公告)号：FR2788907A1

公开(公告)日：2000-07-28

申请号：FR9901062

申请日：1999-01-27

Applicant: ST MICROELECTRONICS SA

Inventor： MAZZONI SIMONE ,  CAMBONIE JOEL

IPC: H04J11/00 ,  H04L27/26 ,  H04J13/00

Abstract: The circuit takes a sample from the header and re-copies this at the end of the signal. The circuit generates a cyclical symbol prefix composed of a series of samples in the time domain. The prefix is the reproduction of the last symbol samples in the symbol header. The symbol is obtained by inverse Fourier transformation of the complex coefficients corresponding to the respective frequencies. The circuit includes a device (22) for dephasing each complex coefficient of a value proportional to its frequency. A memory (24) is provided for storing the samples of the start of the symbol, and a further circuit (16) is provided for re-copying the memorised samples at the end of the symbol.

公开(公告)号：FR2772950B1

公开(公告)日：2000-03-17

申请号：FR9716115

申请日：1997-12-19

Applicant: ST MICROELECTRONICS SA

Inventor： CAMBONIE JOEL

IPC: G06F17/14 ,  G06F9/38

Abstract: Device is characterised in that it comprises a first stage of treatment of a radix equal to 4 including an element by element processing step for carrying out the Fourier transforms on elementary parts equal to 4 on data blocks. Also included is a means for memorising the elements including a random access memory, especially a direct access memory.

公开(公告)号：DE69830971T2

公开(公告)日：2006-04-27

申请号：DE69830971

申请日：1998-12-09

Applicant: ST MICROELECTRONICS SA

Inventor： CAMBONIE JOEL

IPC: G06F17/14

公开(公告)号：FR2850766A1

公开(公告)日：2004-08-06

申请号：FR0301137

申请日：2003-01-31

Applicant: ST MICROELECTRONICS SA

Inventor： CAMBONIE JOEL

IPC: G06F7/52 ,  G06F7/57 ,  G06F15/78 ,  H03K19/177 ,  G06F15/76

Abstract: The circuit has a tile with two cells (CEL1, CEL10). Each cell has a multiplier (MX1), an arithmetic and logical unit to make arithmetic and logical function. Two switching blocks are connected to input and output of the multiplier, respectively and to a vertical bus (BSV1). A retained propagation bus is connected to the arithmetic and logical unit. A switching block terminal is connected to the vertical bus.

公开(公告)号：FR2794598B1

公开(公告)日：2001-09-21

申请号：FR9906963

申请日：1999-06-02

Applicant: ST MICROELECTRONICS SA

Inventor： CAMBONIE JOEL ,  MEJEAN PHILIPPE ,  BARTHEL DOMINIQUE ,  LIENARD JOEL ,  MAZZONI SIMONE

IPC: G06F17/14 ,  G06T1/60 ,  H04J11/00 ,  H04L27/26 ,  H04L27/32

Abstract: The inverse Fourier transform parallel pipeline processing technique inputs initial samples (Ck) of a digital stream to an interlaced processing unit. An auxiliary complex sample (Ak) is formed from initial input. Different stages of inverse transformation are carried out using pipeline architecture processing (DF), using two different memories (MMA,MMB), the elementary processing being separated into two parts.

公开(公告)号：FR2794921B1

公开(公告)日：2001-09-14

申请号：FR9907495

申请日：1999-06-14

Applicant: ST MICROELECTRONICS SA

Inventor： CAMBONIE JOEL ,  MEJEAN PHILIPPE ,  BARTHEL DOMINIQUE ,  LIENARD JOEL

IPC: H04L27/00 ,  G06T1/60 ,  H04J11/00 ,  H04L1/00 ,  H04L27/26 ,  H04L27/32

Abstract: A sequential development of exit N samples (Ck) and their sequential delivery in a natural order (k) is obtained from a second addressing sequence containing natural and reversed orders. The phase of subsequent processing of the symbol auxiliary sequence (UK) temporally overlaps with respective phases of corresponding processing of the previous (UK-i) and the next symbol (UK+i). The addressing of the two memorials is successively and performed alternately according to the first and the second addresses sequence. An Independent claim is included for: (a) a device for transforming two groups of samples

公开(公告)号：FR2772951B1

公开(公告)日：2000-03-17

申请号：FR9716116

申请日：1997-12-19

Applicant: ST MICROELECTRONICS SA

Inventor： CAMBONIE JOEL

IPC: G06F17/14 ,  G06F9/38

公开(公告)号：FR2772950A1

公开(公告)日：1999-06-25

申请号：FR9716115

申请日：1997-12-19

Applicant: ST MICROELECTRONICS SA

Inventor： CAMBONIE JOEL

IPC: G06F17/14 ,  G06F9/38

Abstract: Device is characterised in that it comprises a first stage of treatment of a radix equal to 4 including an element by element processing step for carrying out the Fourier transforms on elementary parts equal to 4 on data blocks. Also included is a means for memorising the elements including a random access memory, especially a direct access memory.