GUARD INTERVAL OCCURRENCE IN DMT MODULATION TECHNIQUE

    公开(公告)号:JP2000224138A

    公开(公告)日:2000-08-11

    申请号:JP2000017221

    申请日:2000-01-26

    Abstract: PROBLEM TO BE SOLVED: To specially reduce a transmission delay by permitting a last sample forming a symbol before a shift to be placed at the beginning of the symbol, after the shift to directly form a prefix. SOLUTION: A complex coefficient Ai.ejϕi is added to an IFFT circuit 12 through a complex multiplier 22 in the case that i belongs to [1, N]. The N coefficients eiKiτ are respectively added to the second input of the multiplier 22 in correspondence. The IFFT circuit outputs a first sample S1' of the symbol Dt' with a time t1 and a memory 24 stores the sample which is controlled in a writing mode. A multiplexer 16 is changed-over and selects the output of the circuit 12. The state of a circuit 10 is kept in a state without changes, until a time tτ. Thus, the samples from S1' to Sj' can be stored in the memory 24 and cyclic prefixes formed by S1' to Sj' are given to the output of the multiplexer 16.

    2.
    发明专利
    未知

    公开(公告)号:FR2788907B1

    公开(公告)日:2001-04-13

    申请号:FR9901062

    申请日:1999-01-27

    Abstract: The circuit takes a sample from the header and re-copies this at the end of the signal. The circuit generates a cyclical symbol prefix composed of a series of samples in the time domain. The prefix is the reproduction of the last symbol samples in the symbol header. The symbol is obtained by inverse Fourier transformation of the complex coefficients corresponding to the respective frequencies. The circuit includes a device (22) for dephasing each complex coefficient of a value proportional to its frequency. A memory (24) is provided for storing the samples of the start of the symbol, and a further circuit (16) is provided for re-copying the memorised samples at the end of the symbol.

    4.
    发明专利
    未知

    公开(公告)号:FR2788907A1

    公开(公告)日:2000-07-28

    申请号:FR9901062

    申请日:1999-01-27

    Abstract: The circuit takes a sample from the header and re-copies this at the end of the signal. The circuit generates a cyclical symbol prefix composed of a series of samples in the time domain. The prefix is the reproduction of the last symbol samples in the symbol header. The symbol is obtained by inverse Fourier transformation of the complex coefficients corresponding to the respective frequencies. The circuit includes a device (22) for dephasing each complex coefficient of a value proportional to its frequency. A memory (24) is provided for storing the samples of the start of the symbol, and a further circuit (16) is provided for re-copying the memorised samples at the end of the symbol.

    9.
    发明专利
    未知

    公开(公告)号:DE60002371D1

    公开(公告)日:2003-06-05

    申请号:DE60002371

    申请日:2000-01-25

    Abstract: The circuit takes a sample from the header and re-copies this at the end of the signal. The circuit generates a cyclical symbol prefix composed of a series of samples in the time domain. The prefix is the reproduction of the last symbol samples in the symbol header. The symbol is obtained by inverse Fourier transformation of the complex coefficients corresponding to the respective frequencies. The circuit includes a device (22) for dephasing each complex coefficient of a value proportional to its frequency. A memory (24) is provided for storing the samples of the start of the symbol, and a further circuit (16) is provided for re-copying the memorised samples at the end of the symbol.

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