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公开(公告)号：FR2858457A1
公开(公告)日：2005-02-04
申请号：FR0309456
申请日：2003-07-31
Applicant: ST MICROELECTRONICS SA
Inventor： NAURA DAVID , BERTRAND BERTRAND , CHEHADI MOHAMAD
Abstract: The method involves applying a memory cell state fixation pulse on a floating gate of a transistor of the cell of a non-volatile memory. A high voltage signal for adjusting the cell state fixing portion is applied on a ramp voltage generation circuit (301) of the memory from outside the memory at a preset duration. The cell state fixing portion is adjusted at the preset duration. An independent claim is also included for a non volatile memory.
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公开(公告)号：FR2854967A1
公开(公告)日：2004-11-19
申请号：FR0305742
申请日：2003-05-13
Applicant: ST MICROELECTRONICS SA
Inventor： NAURA DAVID , BERTRAND BERTRAND , CHEHADI MOHAMAD
Abstract: Device, such as semiconductor memory or EEPROM, communicates following a communication protocol that forecasts transmission of acknowledgement signals (ACK) at predefined instants. The operating mode is identified by a shift in time of the moment of transmission of the ACK signal relative to the forecast moment. An independent claim is also included for a device for identifying the mode of operation of a device.
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公开(公告)号：FR2853781A1
公开(公告)日：2004-10-15
申请号：FR0304365
申请日：2003-04-09
Applicant: ST MICROELECTRONICS SA
Inventor： BERTRAND BERTRAND , CHEHADI MOHAMAD , NAURA DAVID
IPC: H03K3/011 , H03K3/012 , H03K3/3565
Abstract: The trigger has a latch with four transistors, where latch has two thresholds, and an input (IN) and an output (OUT) for forming an input and an output of the trigger. The latch also has a middle point between a supply terminal and an output of the latch. A negative feedback acts on the middle point to fix one of the thresholds according to supply potential. One threshold is a function of a stable reference potential.
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公开(公告)号：FR2821974B1
公开(公告)日：2003-05-23
申请号：FR0103284
申请日：2001-03-12
Applicant: ST MICROELECTRONICS SA
Inventor： NAURA DAVID , BERTRAND BERTRAND , CHEHADI MOHAMAD
Abstract: A circuit produces a voltage for the erasure or programming of a memory cell. The circuit includes a capacitor, and a discharge circuit connected to a first terminal of the capacitor. The discharge circuit includes a first transistor, a drain of which is connected to the first terminal of the capacitor. The first transistor activates the discharge circuit when a discharge signal is received by a gate of the first transistor. The discharge circuit includes a slow discharge arm and a fast discharge arm parallel-connected to the source of the first transistor. The discharge circuit produces a low discharge current or a high discharge current for discharging the capacitor as a function of an operating mode selection signal.
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公开(公告)号：DE69800493D1
公开(公告)日：2001-02-22
申请号：DE69800493
申请日：1998-10-14
Applicant: ST MICROELECTRONICS SA
Inventor： CHEHADI MOHAMAD , NAURA DAVID
Abstract: As the high voltage and low voltage command are applied separately, all access modes can be used at the same time, thus gaining time.
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Patent Agency Ranking
公开(公告)号：FR2786911A1
公开(公告)日：2000-06-09
申请号：FR9815447
申请日：1998-12-02
Applicant: ST MICROELECTRONICS SA
Inventor： CHEHADI MOHAMAD
Abstract: Secure non volatile electrically modifiable memory having a cell matrix (1) which can operate in read or write (4) mode. There is a supplementary cell (8) called a witness cell with read association (9) which allows a detection level to be monitored showing when radiating ultraviolet light has been applied to change the characteristics of the witness cell.
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公开(公告)号：DE60226800D1
公开(公告)日：2008-07-10
申请号：DE60226800
申请日：2002-03-05
Applicant: ST MICROELECTRONICS SA
Inventor： NAURA DAVID , BERTRAND BERTRAND , CHEHADI MOHAMAD
IPC: G11C16/12
Abstract: A circuit produces a voltage for the erasure or programming of a memory cell. The circuit includes a capacitor, and a discharge circuit connected to a first terminal of the capacitor. The discharge circuit includes a first transistor, a drain of which is connected to the first terminal of the capacitor. The first transistor activates the discharge circuit when a discharge signal is received by a gate of the first transistor. The discharge circuit includes a slow discharge arm and a fast discharge arm parallel-connected to the source of the first transistor. The discharge circuit produces a low discharge current or a high discharge current for discharging the capacitor as a function of an operating mode selection signal.
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公开(公告)号：FR2854967B1
公开(公告)日：2005-08-05
申请号：FR0305742
申请日：2003-05-13
Applicant: ST MICROELECTRONICS SA
Inventor： NAURA DAVID , BERTRAND BERTRAND , CHEHADI MOHAMAD
Abstract: Device, such as semiconductor memory or EEPROM, communicates following a communication protocol that forecasts transmission of acknowledgement signals (ACK) at predefined instants. The operating mode is identified by a shift in time of the moment of transmission of the ACK signal relative to the forecast moment. An independent claim is also included for a device for identifying the mode of operation of a device.
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公开(公告)号：FR2853781B1
公开(公告)日：2005-06-10
申请号：FR0304365
申请日：2003-04-09
Applicant: ST MICROELECTRONICS SA
Inventor： BERTRAND BERTRAND , CHEHADI MOHAMAD , NAURA DAVID
IPC: H03K3/011 , H03K3/012 , H03K3/3565
Abstract: The trigger has a latch with four transistors, where latch has two thresholds, and an input (IN) and an output (OUT) for forming an input and an output of the trigger. The latch also has a middle point between a supply terminal and an output of the latch. A negative feedback acts on the middle point to fix one of the thresholds according to supply potential. One threshold is a function of a stable reference potential.
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公开(公告)号：DE60018752D1
公开(公告)日：2005-04-21
申请号：DE60018752
申请日：2000-06-26
Applicant: ST MICROELECTRONICS SA
Inventor： DEVIN JEAN , CHEHADI MOHAMAD
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