公开(公告)号：FR2780162A1

公开(公告)日：1999-12-24

申请号：FR9807788

申请日：1998-06-19

Applicant: ST MICROELECTRONICS SA

Inventor： FROMENT BENOIT

IPC: G01R27/26 ,  G01R31/28 ,  G01R27/16

Abstract: Structure for testing multilayer integrated circuits, where each layer has its own conducting tracks. The test structure comprises an ammeter (7) connected between a power input (8) and an earth (6) and at least two circuit branches. Circuit breakers (9,11) are arranged so that the capacitance between two circuit tracks (1,2) can be determined. The first branch comprises a first breaker (9) between the ammeter and a first track (1), and the second branch has a similar arrangement of breaker between ammeter and second track (2).

公开(公告)号：FR2789803A1

公开(公告)日：2000-08-18

申请号：FR9901741

申请日：1999-02-12

Applicant: ST MICROELECTRONICS SA

Inventor： FROMENT BENOIT ,  GAYET PHILIPPE ,  VAN DER VEGT ERIK

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L23/532

Abstract: At least one layer of a dielectric material (3) is deposited on a copper track (1) covered with an encapsulation layer (2). A cavity (6) is etched in the layer of dielectric material at the location of the future vertical connection. At least one protective layer (7) is deposited in said cavity to preclude diffusion of copper. The protective layer (7) at the bottom of the cavity (6) is subjected to an anisotropic etching treatment and also the encapsulation layer (2) is subjected to etching, whereafter the cavity is filled with copper. The copper particles pulverized during etching of the encapsulation layer do not contaminate the dielectric material.