公开(公告)号：FR2868626B1

公开(公告)日：2006-06-23

申请号：FR0450641

申请日：2004-03-31

Applicant: ST MICROELECTRONICS SA

Inventor： GATTI PAOLO ,  SABUT MARC

IPC: H03F3/45

Abstract: A differential amplifier having a first and second output terminals and receiving an input signal at an input terminal. The amplifier comprises a first amplifier having a first input connected to the input terminal, a second input and a first output connected together to the first output terminal, and a second output connected to the second output terminal, the first amplifier reproducing the input signal on the first output. The amplifier comprises a second amplifier having a first input receiving a reference signal and a second input connected to the output terminals by resistive elements and controlling the provision by the first amplifier on the second output of a signal such that the signals received at the first and second inputs of the second amplifier are equal.

公开(公告)号：FR2832519B1

公开(公告)日：2004-02-20

申请号：FR0114926

申请日：2001-11-19

Applicant: ST MICROELECTRONICS SA

Inventor： VAN ZANTEN FRANCOIS ,  SABUT MARC ,  RIBAS RAYMOND

IPC: G05F3/26 ,  H03F3/189 ,  H03F1/42

Abstract: A mirroring circuit operating at high frequencies is provided. The mirroring circuit includes a first branch having a first transistor in series with a first resistor, a second branch having a second transistor in series with a second resistor, and a servo circuit for controlling current flowing in the first branch and the second branch. The servo circuit includes a third transistor configured as a diode, a source of the third transistor coupled to a source of the first transistor, a fourth transistor configured as a shift lever, a source of the fourth transistor coupled to ground via a third resistor, a fifth transistor configured as a diode, a source of the fifth transistor coupled to a source of the second transistor, and a sixth transistor configured as a shift lever, a source of the sixth transistor coupled to ground via the third resistor.

公开(公告)号：FR2817408B1

公开(公告)日：2003-03-21

申请号：FR0015522

申请日：2000-11-30

Applicant: ST MICROELECTRONICS SA

Inventor： MOURET MICHEL ,  SABUT MARC ,  VAN ZANTEN FRANCOIS

IPC: H03G7/06 ,  H03F3/45 ,  H03G3/30

Abstract: A controllable assembly of current sources includes several first output terminals, with a first transistor associated with each first output terminal, the current on each first output terminal depending on the current flowing through the first transistor, and a circuit configured, in response to a predetermined variation of a control voltage, to successively progressively turn on, then progressively turn off, each first transistor. The first transistors are MOS transistors, and each first output terminal is associated with a current mirror formed of MOS transistors, the current mirror providing to the first output terminal a current depending on the current flowing through the first transistor.

公开(公告)号：DE60134495D1

公开(公告)日：2008-07-31

申请号：DE60134495

申请日：2001-11-29

Applicant: ST MICROELECTRONICS SA

Inventor： MOURET MICHEL ,  SABUT MARC ,  VAN ZANTEN FRANCOIS

IPC: H03G7/06

Abstract: A controllable assembly of current sources includes several first output terminals, with a first transistor associated with each first output terminal, the current on each first output terminal depending on the current flowing through the first transistor, and a circuit configured, in response to a predetermined variation of a control voltage, to successively progressively turn on, then progressively turn off, each first transistor. The first transistors are MOS transistors, and each first output terminal is associated with a current mirror formed of MOS transistors, the current mirror providing to the first output terminal a current depending on the current flowing through the first transistor.

公开(公告)号：DE60127724D1

公开(公告)日：2007-05-16

申请号：DE60127724

申请日：2001-12-14

Applicant: ST MICROELECTRONICS SA

Inventor： MOURET MICHEL ,  SABUT MARC ,  VAN ZANTEN FRANCOIS

IPC: H03G1/00 ,  H03G7/08

Abstract: A variable-gain amplifier with a differential input and differential output, including an attenuator block, receiving an input voltage and providing, on several outputs, voltages, each of which is equal to the attenuated input voltage; differential transconductor elements, each having a first input connected to a respective output of the attenuator block, and generating first and second positive currents and first and second negative currents; a current source assembly adapted to controlling the transconductance of each differential transconductor element according to an analog control signal; and an output block converting first and second input currents into a differential output voltage and providing a second input of each differential transconductor element with a feedback voltage depending on the output voltage.

公开(公告)号：FR2881236B1

公开(公告)日：2007-04-06

申请号：FR0550227

申请日：2005-01-26

Applicant: ST MICROELECTRONICS SA

Inventor： SABUT MARC ,  MORO JEAN LUC

IPC: G05F3/26

Abstract: The circuit has a current source (31) that connects a gate of a P-channel metal oxide semiconductor (MOS) transistor (MP0) to a voltage application terminal (2). A current source (22) connects a drain of a P-channel MOS transistor (MP1) to the ground (3). The transistor (MP0) connects the source of the transistor (MP1) to the terminal and has its gate connected to drain of the transistor (MP1) by an N-channel MOS transistor (MN0).

公开(公告)号：FR2881236A1

公开(公告)日：2006-07-28

申请号：FR0550227

申请日：2005-01-26

Applicant: ST MICROELECTRONICS SA

Inventor： SABUT MARC ,  MORO JEAN LUC

IPC: G05F3/26

Abstract: L'invention concerne un circuit de génération d'une tension de référence (VrefP) par un premier transistor MOS (MP0) d'un premier type connecté à une première borne (2) d'application d'une tension d'alimentation (Vdd), ledit premier transistor étant en série avec un deuxième transistor MOS (MP1) de même type commandé par un étage d'entrée (12) d'un amplificateur à transconductance et leur point milieu définissant une borne (4) de sortie fournissant la tension de référence, une première source de courant (31) de valeur fixe reliant ladite première borne d'alimentation à la grille du premier transistor, une deuxième source de courant (22) de valeur fixe reliant le deuxième transistor à une deuxième borne (3) d'application de la tension d'alimentation.

公开(公告)号：FR2868626A1

公开(公告)日：2005-10-07

申请号：FR0450641

申请日：2004-03-31

Applicant: ST MICROELECTRONICS SA

Inventor： GATTI PAOLO ,  SABUT MARC

IPC: H03F3/45

Abstract: L'invention concerne un amplificateur différentiel (30) ayant des première et seconde bornes de sortie (OUT-, OUT+) et une borne d'entrée (IN). L'amplificateur comprend un premier amplificateur (32) ayant une première entrée (I1+) reliée à la borne d'entrée (IN), une seconde entrée (I1-) et une première sortie (O1+) reliées ensemble à la première borne de sortie (OUT+), et une seconde sortie (O1-) reliée à la seconde borne de sortie (OUT-) , et reproduisant le signal d'entrée (VIN) sur la première sortie (O1+). L'amplificateur comprend un second amplificateur (34) ayant une première entrée (I2+) recevant un signal de référence (VREF) et une seconde entrée (I2-) reliée aux bornes de sortie (OUT+, OUT-) par des éléments résistifs (36, 38), et commandant la fourniture par le premier amplificateur (32) sur la seconde sortie (O1-) d'un signal (VO-) tel que les signaux reçus aux première et seconde entrées (I2+, 12-) du second amplificateur sont égaux.

公开(公告)号：FR2856855A1

公开(公告)日：2004-12-31

申请号：FR0350271

申请日：2003-06-27

Applicant: ST MICROELECTRONICS SA

Inventor： SABUT MARC ,  VAN ZANTEN FRANCOIS ,  MORO JEAN LUC

IPC: H03K3/356 ,  H03K17/06 ,  H03K17/10 ,  H03K17/30 ,  H02M3/07

Abstract: A device for controlling a voltage-controlled switch from a digital signal, comprising: a first means for providing the digital signal to the output terminal of the switch; a second means for biasing the switch control terminal to a level greater than the threshold voltage of the switch and smaller than the sum of said threshold voltage and of the maximum voltage of the digital signal; and a third means for adding or subtracting to said level said maximum voltage of the digital signal respectively at the rising and falling edges of the logic inverse of the digital signal.

公开(公告)号：FR2977410A1

公开(公告)日：2013-01-04

申请号：FR1155872

申请日：2011-06-30

Applicant: ST MICROELECTRONICS GRENOBLE 2 ,  ST MICROELECTRONICS SA

Inventor： SABUT MARC ,  TROCHUT SEVERIN ,  CURIS CHRISTOPHE

IPC: H02M1/36 ,  H02M3/335

Abstract: L'invention est relative à un dispositif de modulation de largeur d'impulsion, comprenant un transistor de commutation (MN1) servant à définir les phases de la modulation ; un condensateur (C) ; des commutateurs (S1, S2, S3) agencés pour, dans une première phase, charger le condensateur à une tension (Vt) correspondant à un seuil d'extinction du transistor de commutation, et, dans une deuxième phase, connecter le condensateur entre une borne d'application d'une tension de consigne (Vref) et la grille du transistor de commutation (MN1) ; et une source de courant constant (MI3) connectée pour appliquer un courant dans le condensateur tendant à ramener la grille du transistor de commutation vers le seuil d'extinction (Vt).