11.
    发明专利
    未知

    公开(公告)号:DE69718435T2

    公开(公告)日:2003-10-23

    申请号:DE69718435

    申请日:1997-02-07

    Abstract: The invention relates to a voltage regulator of the type comprising a linear filter (2), a comparator (3), and a stretcher filter (4) which are connected in cascade with one another between an input terminal (I1) and an output terminal (O1) of the regulator (1), the input terminal (I1) receiving an error signal (ERR) as converted by the comparator (3) into a square-wave error signal (ERRq), and the output terminal (O1) delivering a square-wave output control signal (Sout) which has a stretched duty cycle over the square-wave error signal (ERRq) by a time delay (tA) introduced from the stretcher filter (4). The regulator of this invention further comprises a non-linear filtering section (5) for the error signal (ERR) which is connected between the input terminal (I1) of the regulator (1) and the linear filter (2) and has linear gain with the error signal (ERR) below a first value (X1), gain approximately of unity with the error signal (ERR) between the first value (X1) and a second value (X2), and zero gain with the error signal (ERR) above the second value (X2). The invention also concerns a method for filtering a noisy electric signal.

    12.
    发明专利
    未知

    公开(公告)号:DE69718435D1

    公开(公告)日:2003-02-20

    申请号:DE69718435

    申请日:1997-02-07

    Abstract: The invention relates to a voltage regulator of the type comprising a linear filter (2), a comparator (3), and a stretcher filter (4) which are connected in cascade with one another between an input terminal (I1) and an output terminal (O1) of the regulator (1), the input terminal (I1) receiving an error signal (ERR) as converted by the comparator (3) into a square-wave error signal (ERRq), and the output terminal (O1) delivering a square-wave output control signal (Sout) which has a stretched duty cycle over the square-wave error signal (ERRq) by a time delay (tA) introduced from the stretcher filter (4). The regulator of this invention further comprises a non-linear filtering section (5) for the error signal (ERR) which is connected between the input terminal (I1) of the regulator (1) and the linear filter (2) and has linear gain with the error signal (ERR) below a first value (X1), gain approximately of unity with the error signal (ERR) between the first value (X1) and a second value (X2), and zero gain with the error signal (ERR) above the second value (X2). The invention also concerns a method for filtering a noisy electric signal.

    13.
    发明专利
    未知

    公开(公告)号:IT1251352B

    公开(公告)日:1995-05-08

    申请号:IT2078490

    申请日:1990-06-27

    Abstract: A broad operational range, automatic device for the change of frequency in the horizontal deflection of multi-synchronization monitors comprises an integrated circuit (2) incorporating, a frequency meter (3) being input an analog synchronization signal (S1), a phase comparator (14) having two inputs (15,16) and in turn receiving said synchronization signal (S1) on one input (15), a voltage (Vc)-controlled oscillator (12) adapted to output a signal (S3) whose frequency is depending on said voltage (Vc) and operatively linked to an output (22) of said phase comparator (14), and a counter (9) connected with its input, on the one side, to the oscillator (12) output, and on the other side, to the meter (3) output, said counter having an output (21) connected to the other input of the phase comparator (14) also forming the integrated circuit (2) output.

    14.
    发明专利
    未知

    公开(公告)号:IT9020784D0

    公开(公告)日:1990-06-27

    申请号:IT2078490

    申请日:1990-06-27

    Abstract: A broad operational range, automatic device for the change of frequency in the horizontal deflection of multi-synchronization monitors comprises an integrated circuit (2) incorporating, a frequency meter (3) being input an analog synchronization signal (S1), a phase comparator (14) having two inputs (15,16) and in turn receiving said synchronization signal (S1) on one input (15), a voltage (Vc)-controlled oscillator (12) adapted to output a signal (S3) whose frequency is depending on said voltage (Vc) and operatively linked to an output (22) of said phase comparator (14), and a counter (9) connected with its input, on the one side, to the oscillator (12) output, and on the other side, to the meter (3) output, said counter having an output (21) connected to the other input of the phase comparator (14) also forming the integrated circuit (2) output.

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