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    METHOD FOR RECOGNIZING PROGRESSIVE OR INTERLACE CONTENTS IN VIDEO SEQUENCE
    11.
    发明专利
    METHOD FOR RECOGNIZING PROGRESSIVE OR INTERLACE CONTENTS IN VIDEO SEQUENCE 失效

    公开(公告)号：JP2001103521A

    公开(公告)日：2001-04-13

    申请号：JP2000266755

    申请日：2000-09-04

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PAU DANILO ,  LUCA PEZZONI ,  ROVATI FABRIZIO ,  SIRTORI DANIELE

    IPC: H04N7/32 ,  H04N7/26 ,  H04N17/00

    Abstract: PROBLEM TO BE SOLVED: To provide a technology that detects whether contents of a picture in a video sequence are of a progressive type or an interlace type. SOLUTION: The technology of this invention demarcates a bottom field Bc of a current picture, a top field Tc of the current picture, a bottom field Bp of a preceding picture, and a top field Tp of the preceding picture. Settling whether the current picture decomposed into the fields Bc and Tc is a progressive picture or an interlace picture recognizes whether contents of the video picture are progressive or interlace contents.

    13.
    发明专利
    未知

    公开(公告)号：DE69940506D1

    公开(公告)日：2009-04-16

    申请号：DE69940506

    申请日：1999-09-08

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PAU DANILO ,  BORTOT LUCA ,  SACCHI MARIA LUISA

    IPC: H04N7/50 ,  H03M7/30 ,  H04N7/26 ,  H04N7/30

    Abstract: A method of measuring the activity of a macroblock of a picture in the direct cosine transform domain of values assumed by a selected component of the video signal comprises a) separately storing in a memory blocks of data into which is divided a macroblock in the discrete cosine transform domain before quantization; b) reading from said memory the data of each of the blocks constituting said macroblock representing said selected component in the discrete cosine transform domain obtaining the respective coefficients; c) multipliying the absolute value of said coefficients by a selected mask of words of a number not exceeding the number of words constituting the block; d) summing the results of said moltiplications producing an activity coefficient for each of the blocks constituting said macroblock; e) calculating a first activity coefficient of the macroblock (actj) as the sum of said activity coefficients produced for each block; f) calculating a normalized activity value of the macroblock as the ratio between the sum of the double of said activity coefficient (actj) with a mean activity (mean_actj) relative to the preceding coded frame and the sum of the double of the coefficient mean_actj with the activity coefficient actj.

    15.
    发明专利
    未知

    公开(公告)号：DE69614675T2

    公开(公告)日：2001-12-06

    申请号：DE69614675

    申请日：1996-06-28

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PAU DANILO

    IPC: H04N5/907 ,  H04N5/92 ,  H04N7/26 ,  H04N7/32 ,  H04N7/50

    Abstract: The video memory requisite of an MPEG decoder effecting a decompression of the I, P and optionally also of the B picture according to the MPEG compression algorithm and requiring the storing in respective buffers organized in said video memory of the respective MPEG- decompressed data, may be dynamically reduced by subsampling and recompressing according to a ADPCM algorithm at least the data pertaining to the I and P pictures before coding and storing them in the respective buffers. Subsequently, the stored data are decoded, decompressed and upsampled for reconstructing blocks of pels to be sent to a macroblock-to-raster scan conversion circuit.

    17.
    发明专利
    未知

    公开(公告)号：DE602004009150D1

    公开(公告)日：2007-11-08

    申请号：DE602004009150

    申请日：2004-02-18

    Applicant: ST MICROELECTRONICS SRL ,  SGS THOMSON MICROELECTRONICS

    Inventor： GARDELLA PIER LUIGI ,  BARONE MASSIMILIANO ,  SWEET GARY ,  PAU DANILO ,  HILL STEPHEN ,  GODA SIMON

    IPC: H04N1/41 ,  G06T3/40 ,  G09G3/20 ,  G09G5/02 ,  H04N1/40 ,  H04N1/64 ,  H04N7/26

    Abstract: A dither matrix is applied to a high-resolution image to compare the value of each of the pixels that compose it with a threshold value of the matrix and to obtain an output value of the matrix (Dither matrix value) from each comparison. To each pixel value (in_value_r) of the image there is applied the algorithm represented by the schematic layout of Figure 7 to obtain the pixel values (Out_r) of a low-resolution image. C1-C5 and n1-n10 are parameters that may be selected by means of predetermined criteria based on comparisons of the low-resolution image, obtained by means of the operations described above, with an equivalent low-resolution image obtained by means of a sample method.

    19.
    发明专利
    未知

    公开(公告)号：DE69616746D1

    公开(公告)日：2001-12-13

    申请号：DE69616746

    申请日：1996-03-20

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PAU DANILO

    IPC: H04N5/907 ,  H03M7/38 ,  H04N5/44 ,  H04N7/01 ,  H04N7/015 ,  H04N7/26 ,  H04N7/32 ,  H04N7/50 ,  H04N9/64 ,  H04N11/04 ,  H04N19/593

    Abstract: An SQTV processor for converting a video signal received at an interlaced scanning frequency of 50 or 60 Hz, respectively to an interlaced scanning frequency of 100 or 120 Hz and implementing algorithms of noise filtering and of edge definition, including an analog-digital converter (ADC) of analog input signals of luminance and chrominance, at least a field memory (FIELD MEMORY_1) or more preferably two similar field memories where digital blocks of luminance (Y) value and blocks of values of each one of the two chrominance (U, V) components of said converted video signals are stored, one "First-In-First-Out" (LINE MEMORY) register for digital values read from said filed memory containing the pixels of a whole line of each field, a noise filtering block (NOISE REDUCTION), a sampling frequency converter (SRC) of said fields from 50 or 60 Hz to 100 or 120 Hz, means of conversion of the vertical format (VFC), means of edge definition (PE) enhancement and means of digital-to-analog conversion (DAC) of the processed luminance and chrominance (YUV) signals, is further equipped with means for compressing and coding said converted video signals according to an adaptive differential pulse code modulation (ADPCM) scheme of said digital values to be stored in said field memory (FIELD MEMORY_1) and means of ADPCM decoding and decompressing of data read from said field memory (FIELD MEMORY_1). The significative reduction of the total memory requisite produced by the ADPCM pre-compression would make the entire system more readily integratable on a single chip.

    20.
    发明专利
    未知

    公开(公告)号：DE69801209D1

    公开(公告)日：2001-08-30

    申请号：DE69801209

    申请日：1998-03-20

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PICCINELLI EMILIANO ,  PAU DANILO ,  ZUCCARO AMEDEO

    IPC: G06T7/20 ,  H04N7/26 ,  H04N5/00 ,  H04N7/36

    Abstract: By relaying on a temporal correlation among successive pictures beside on a spatial correlation of motion vectors of macroblocks of the currently processed picture and by the use of a hierarchical recursive motion estimation algorithm, the hardware complexity of video coders complying with the MPEG-2 standard can be greatly reduced without an appreciable loss of quality of the video images been transferred. The method of motion estimation and a hardware embodiment of a coder are described and performance is compared with a prior motion estimation system.

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