公开(公告)号：ITMI20031055A1

公开(公告)日：2004-11-28

申请号：ITMI20031055

申请日：2003-05-27

Applicant: ST MICROELECTRONICS SRL

Inventor： CALI GIOVANNI ,  COSENTINO GAETANO ,  PELLERITI ROBERTO ,  TORRISI FELICE

IPC: H03F20060101 ,  H03F1/14 ,  H03F1/22

公开(公告)号：IT1302276B1

公开(公告)日：2000-09-05

申请号：ITMI982076

申请日：1998-09-25

Applicant: ST MICROELECTRONICS SRL

Inventor： FILORAMO PIETRO ,  COSENTINO GAETANO ,  PALMISANO GIUSEPPE

IPC: G05F3/26

Abstract: A current mirror circuit is provided with recovery having high output impedance. The current mirror includes a differential stage having a pair of transistors, and a voltage feedback loop which is stabilized and closed on a first one of the transistors of the differential stage. A second one of the transistors of the differential stage is connected, by its base terminal, to the collector terminal of an output transistor and, by its collector terminal, to the supply voltage. Moreover, the circuit includes a positive feedback loop which has the second transistor of the differential stage and the output transistor. A low-impedance circuit branch is connected to the base terminal of the second transistor of the differential stage and to the collector terminal of the output transistor.

公开(公告)号：DE69830173D1

公开(公告)日：2005-06-16

申请号：DE69830173

申请日：1998-10-06

Applicant: ST MICROELECTRONICS SRL

Inventor： FILORAMO PIETRO ,  COSENTINO GAETANO

IPC: H03L7/189 ,  H03L7/10 ,  H03J5/02

Abstract: A method for reducing the settling time in PLL circuits, particularly for use in an RF transceiver, which comprise a phase comparator (2), a filter (4), a digital-analog converter (8) and an adder (5) which are suitable to produce in output a voltage (Vc) for controlling a voltage-controlled oscillator (6) provided by means of a varactor, characterized in that it comprises the steps of: determining the dependency of the control voltage (Vc) of the voltage-controlled oscillator (6) on the frequency of a selected channel of a transmitter; generating a law describing the variation of the output current (IDAC) of said digital-analog converter (8) such that the voltage (VDAC) obtained from the output current of the digital-analog converter, added to an output voltage (Vf) of said filter (4), is such as to keep said filter voltage (Vf) constant, in order to reduce the settling time of the PLL circuit as a selected channel varies.

公开(公告)号：ITMI20031055D0

公开(公告)日：2003-05-27

申请号：ITMI20031055

申请日：2003-05-27

Applicant: ST MICROELECTRONICS SRL

Inventor： COSENTINO GAETANO ,  CALI GIOVANNI ,  PELLERITI ROBERTO ,  TORRISI FELICE

IPC: H03F1/14 ,  H03F1/22

公开(公告)号：ITMI982076A1

公开(公告)日：2000-03-27

申请号：ITMI982076

申请日：1998-09-25

Applicant: ST MICROELECTRONICS SRL

Inventor： PALMISANO GIUSEPPE ,  FILORAMO PIETRO ,  COSENTINO GAETANO

IPC: G05F3/26

Abstract: A current mirror circuit is provided with recovery having high output impedance. The current mirror includes a differential stage having a pair of transistors, and a voltage feedback loop which is stabilized and closed on a first one of the transistors of the differential stage. A second one of the transistors of the differential stage is connected, by its base terminal, to the collector terminal of an output transistor and, by its collector terminal, to the supply voltage. Moreover, the circuit includes a positive feedback loop which has the second transistor of the differential stage and the output transistor. A low-impedance circuit branch is connected to the base terminal of the second transistor of the differential stage and to the collector terminal of the output transistor.