中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

15 records (took 0.025 seconds)

    1.
    发明专利
    未知

    公开(公告)号：IT1319142B1

    公开(公告)日：2003-09-23

    申请号：ITMI20002559

    申请日：2000-11-28

    Applicant: ST MICROELECTRONICS SRL

    Inventor： CALI GIOVANNI

    IPC: H03F3/45 ,  H03G1/00

    Abstract: It is shown a low noise amplifier comprising a first circuit block suitable for converting a first amplifier input voltage signal into current, a second circuit block adapted to divide the current coming from said first block, said second block being controlled by a second voltage signal, said first and second blocks conferring a variable voltage gain to the amplifier. The amplifier comprises at least one first and at least one second resistors and a feedback network, said at least one first resistor connected with one first output terminal of said second block and with a supply voltage, and said at least one second resistor being connected between said at least one first and at least one second output terminals of said second block, and said feedback network being coupled with said at least one first terminal and with said first circuit block, and said at least one second terminal being coupled with at least one output terminal of said low noise amplifier.

    3.
    发明专利
    未知

    公开(公告)号：DE602004012266D1

    公开(公告)日：2008-04-17

    申请号：DE602004012266

    申请日：2004-09-29

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BRUNO ANGELA ,  CALI GIOVANNI ,  PALLESCHI ANTONIO

    IPC: H03M1/74

    Abstract: The present invention describes an apparatus for the conversion of a digital input signal (Sx) into a required analogic output signal (Idac). The apparatus comprises first circuit means (1, 5) having said digital input signal (Sx) that is representative of the required output signal (Idac) and suitable for producing a first signal (Imain) on an output line (2) and second circuit means (3, 20) suitable for supplying a second signal (Itrim) on said output line (2) in reply to a further digital signal (Dult). The further digital signal (Dult) is function of external variables (Var) and the union of said first (Imain) and said second (Itrim) signal on said output line (2) forms the required analogic output signal (Idac).

    5.
    发明专利
    未知

    公开(公告)号：DE69819677D1

    公开(公告)日：2003-12-18

    申请号：DE69819677

    申请日：1998-02-19

    Applicant: ST MICROELECTRONICS SRL

    Inventor： CALI GIOVANNI ,  GRANATA ANGELO ,  PALMISANO GIUSEPPE

    IPC: H03F3/72 ,  H03F3/00

    Abstract: A circuit for switching a capacitor (C) in an exclusive manner, on the selected one of a plurality of integrated amplifiers (A1, A2, ... AN) comprises a first current generator (IB) connected between a first supply node (VCC) and a first node of the circuit (H), a second current generator (IC) connected between a second supply node (GND) and a second node (L) of the circuit, electrically in parallel to the capacitor (C), an array of switches (S1, S2, ..., SN) of the same number of the integrated amplifiers, exclusively switcheable on, each connecting a directly biased diode (D1, D2, ..., DN) between the first node (H) and the second node (L), each integrated amplifier having a supply node coupled to the connecting node between a respective diode and a respective connecting switch of said array.

    7.
    发明专利
    未知

    公开(公告)号：DE60326789D1

    公开(公告)日：2009-05-07

    申请号：DE60326789

    申请日：2003-06-13

    Applicant: ST MICROELECTRONICS SRL

    Inventor： CALI GIOVANNI ,  PELLERITI ROBERTO ,  TORRISI FELICE

    IPC: H03F3/45

    Abstract: A device for converting a differential signal (Vin1, Vin2) to a single signal (Vout) is described. The device comprises at least one pair of transistors (Q1, Q2) having equal transconductance gain (gm) and which are arranged according a differential stage configuration. The transistors (Q1, Q2) have the differential signal (Vin1, Vin2) in input at the drivable terminals, have first non drivable terminals coupled respectively to first terminals of a first (R1) and a second (Rout) passive elements having second terminals connected with a first supply voltage (VDD), second non drivable terminals coupled to a second supply voltage (VEE) lower than the first supply voltage (VDD). The first terminal of the second passive element (Rout) is the output terminal (OUT) of the device. The last comprises a further transistor (Q3) having a first non drivable terminal connected with the output terminal (OUT) of the device, a second non drivable terminal coupled with said second supply voltage (VEE) and the drivable terminal connected with the first terminal of the first passive element (R1). The further transistor (Q3) has such a transconductance gain (gm3) that the product of said transconductance gain (gm3) by said first passive element (R1) is unitary.

Patent Agency Ranking