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    METHOD AND DEVICE FOR IRREVERSIBLY PROGRAMMING AND READING NONVOLATILE MEMORY CELLS
    11.
    发明专利
    METHOD AND DEVICE FOR IRREVERSIBLY PROGRAMMING AND READING NONVOLATILE MEMORY CELLS 未知

    公开(公告)号：SG151220A1

    公开(公告)日：2009-04-30

    申请号：SG2008070179

    申请日：2008-09-22

    Applicant: ST MICROELECTRONICS SRL

    Inventor： RESTA CLAUDIO ,  BEDESCHI FERDINANDO ,  PELLIZZER FABIO

    Abstract: METHOD AND DEVICE FOR IRREVERSIBLY PROGRAMMING AND READING NONVOLATILE MEMORY CELLS In a nonvolatile memory device, data stored in a memory cell (21a, 21b) are associated to whether or not the memory cell is switchable between a first state and a second state. Memory cells are irreversibly programmed by applying an irreversible programming signal (I[err]), such that the nonvolatile memory cells (21a) are made not switchable between the first state and the second state in response to the irreversible programming signal (I[err]). Reading memory cells includes: assessing (100, 110, 120, 140, 150, 160) whether a memory cell (21a, 21b) is switchable between a first state and a second state; determining that a first irreversible logic value ("1") is associated to the memory cell (21a), if the memory cell (21a) is not switchable between the first state and the second state (130); and determining that a second irreversible logic value ("0") is associated to the memory cell (21b), if the memory cell (21b) is switchable between the first state and the second state (170).

    12.
    发明专利
    未知

    公开(公告)号：DE102008041947A1

    公开(公告)日：2009-04-23

    申请号：DE102008041947

    申请日：2008-09-10

    Applicant: ST MICROELECTRONICS SRL

    Inventor： RESTA CLAUDIO ,  BEDESCHI FERDINANDO ,  PELLIZZER FABIO

    IPC: G11C17/14 ,  G11C16/02

    Abstract: In a nonvolatile memory device, data stored in a memory cell (21a, 21b) are associated to whether or not the memory cell is switchable between a first state and a second state. Memory cells are irreversibly programmed by applying an irreversible programming signal (I IRP ), such that the nonvolatile memory cells (21a) are made not switchable between the first state and the second state in response to the irreversible programming signal (I IRP ). Reading memory cells includes: assessing (100, 110, 120, 140, 150, 160) whether a memory cell (21a, 21b) is switchable between a first state and a second state; determining that a first irreversible logic value ("1") is associated to the memory cell (21a), if the memory cell (21a) is not switchable between the first state and the second state (130); and determining that a second irreversible logic value ("0") is associated to the memory cell (21b), if the memory cell (21b) is switchable between the first state and the second state (170).

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