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    Method and device for irreversibly programming and reading nonvolatile memory cell
    1.
    发明专利
    Method and device for irreversibly programming and reading nonvolatile memory cell 有权
    用于不可逆编程和读取非易失性存储器单元的方法和装置

    公开(公告)号：JP2009093786A

    公开(公告)日：2009-04-30

    申请号：JP2008280494

    申请日：2008-10-03

    Applicant: St Microelectronics Srl ,  エッセティマイクロエレクトロニクス ソシエタ ア レスポンサビリタ リミタータ

    Inventor： RESTA CLAUDIO ,  BEDESCHI FERDINANDO ,  PELLIZZER FABIO

    IPC: G11C13/00

    CPC classification number: G11C13/0069 ,  G11C11/005 ,  G11C11/5678 ,  G11C13/0004 ,  G11C17/16 ,  G11C17/165 ,  G11C2013/0078

    Abstract: PROBLEM TO BE SOLVED: To provide a nonvolatile memory device in which data stored in a memory cell is associated to whether or not the memory cell is switchable between a first state and a second state. SOLUTION: Memory cells are irreversibly programmed by applying an irreversible programming signal (I IRP ), such that the nonvolatile memory cells (21a) are made not switchable between the first state and the second state. Reading memory cells includes: assessing whether the memory cell (21a, 21b) is switchable between the first state and the second state; determining that the first irreversible logic state "1" is associated to the memory cell 21a, if the memory cell is not switchable between the first state and the second state; and determining that the second irreversible logic value "0" is associated to the memory cell (21b), if the memory cell (21b) is switchable between the first state and the second state. COPYRIGHT: (C)2009,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种其中存储在存储单元中的数据与存储单元是否可在第一状态和第二状态之间切换的非易失性存储器件。 解决方案：通过施加不可逆编程信号（I SB> IRP ）使存储单元不可逆地编程，使得非易失性存储单元（21a）不能在第一状态和第二状态之间切换。 读存储单元包括：评估存储单元（21a，21b）是否可在第一状态和第二状态之间切换; 如果存储单元在第一状态和第二状态之间不能切换，则确定第一不可逆逻辑状态“1”与存储器单元21a相关联; 并且如果所述存储单元（21b）可在所述第一状态和所述第二状态之间切换，则确定所述第二不可​​逆逻辑值“0”与所述存储单元（21b）相关联。 版权所有（C）2009，JPO＆INPIT

    METHOD AND DEVICE FOR IRREVERSIBLY PROGRAMMING AND READING NONVOLATILE MEMORY CELLS
    4.
    发明专利
    METHOD AND DEVICE FOR IRREVERSIBLY PROGRAMMING AND READING NONVOLATILE MEMORY CELLS 未知

    公开(公告)号：SG151220A1

    公开(公告)日：2009-04-30

    申请号：SG2008070179

    申请日：2008-09-22

    Applicant: ST MICROELECTRONICS SRL

    Inventor： RESTA CLAUDIO ,  BEDESCHI FERDINANDO ,  PELLIZZER FABIO

    Abstract: METHOD AND DEVICE FOR IRREVERSIBLY PROGRAMMING AND READING NONVOLATILE MEMORY CELLS In a nonvolatile memory device, data stored in a memory cell (21a, 21b) are associated to whether or not the memory cell is switchable between a first state and a second state. Memory cells are irreversibly programmed by applying an irreversible programming signal (I[err]), such that the nonvolatile memory cells (21a) are made not switchable between the first state and the second state in response to the irreversible programming signal (I[err]). Reading memory cells includes: assessing (100, 110, 120, 140, 150, 160) whether a memory cell (21a, 21b) is switchable between a first state and a second state; determining that a first irreversible logic value ("1") is associated to the memory cell (21a), if the memory cell (21a) is not switchable between the first state and the second state (130); and determining that a second irreversible logic value ("0") is associated to the memory cell (21b), if the memory cell (21b) is switchable between the first state and the second state (170).

    5.
    发明专利
    未知

    公开(公告)号：DE102008041947A1

    公开(公告)日：2009-04-23

    申请号：DE102008041947

    申请日：2008-09-10

    Applicant: ST MICROELECTRONICS SRL

    Inventor： RESTA CLAUDIO ,  BEDESCHI FERDINANDO ,  PELLIZZER FABIO

    IPC: G11C17/14 ,  G11C16/02

    Abstract: In a nonvolatile memory device, data stored in a memory cell (21a, 21b) are associated to whether or not the memory cell is switchable between a first state and a second state. Memory cells are irreversibly programmed by applying an irreversible programming signal (I IRP ), such that the nonvolatile memory cells (21a) are made not switchable between the first state and the second state in response to the irreversible programming signal (I IRP ). Reading memory cells includes: assessing (100, 110, 120, 140, 150, 160) whether a memory cell (21a, 21b) is switchable between a first state and a second state; determining that a first irreversible logic value ("1") is associated to the memory cell (21a), if the memory cell (21a) is not switchable between the first state and the second state (130); and determining that a second irreversible logic value ("0") is associated to the memory cell (21b), if the memory cell (21b) is switchable between the first state and the second state (170).

    9.
    发明专利
    未知

    公开(公告)号：DE602004026447D1

    公开(公告)日：2010-05-20

    申请号：DE602004026447

    申请日：2004-09-22

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BEDESCHI FERDINANDO ,  PELLIZZER FABIO ,  BENVENUTI AUGUSTO ,  VENDRAME LORIS ,  ZULIANI PAOLA

    IPC: G11C16/02 ,  G11C11/34

    Abstract: A memory device is proposed. The memory device includes a plurality of memory cells (P,S), wherein each memory cell includes a storage element (P) and a selector (S) for selecting the corresponding storage element during a reading operation or a programming operation. The selector includes a unipolar element (M) and a bipolar element (D;B). The memory device further includes control means (110s) for prevalently enabling the unipolar element during the reading operation or the bipolar element during the programming operation.

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