Abstract:
A stacked die integrated circuit assembly comprising: 1) a substrate; 2) a first integrated circuit die mounted on the substrate; 3) a copper interposer mounted on the first integrated circuit die; and 4) a second integrated circuit die mounted on the copper interposer. The copper interposer significantly reduces the warping of the stacked die IC assembly caused by the warping of the substrate due to thermal changes in the substrate. The copper interposer has a significantly higher coefficient of thermal expansion than a conventional silicon (Si) interposer. The higher CTE enables the copper interposer to counteract the substrate warping.
Abstract:
A system and method is disclosed for providing a redistribution metal layer in an integrated circuit. The redistribution metal layer is formed from the last metal layer in the integrated circuit during manufacture of the integrated circuit before final passivation is applied. The last metal layer provides sites for solder bump pads used in flip chip interconnection. The redistribution metal layer can be (1) a flat layer deposited over the next to last metal layer through an opening in a dielectric layer, or (2) deposited over an array of vias connected to the next to last metal layer. Space between the solder bump pads is deposited with narrower traces for connecting active circuit areas below. A final passivation layer is deposited to ensure product reliability.
Abstract:
A system and method is disclosed for providing mechanical planarization of a sequential build up substrate for an integrated circuit package. A planarization plate is placed in contact with an uneven external surface of a dielectric layer that covers underlying functional circuit elements and filler circuit elements. A heating element in the planarization plate flattens protruding portions of the external surface of the dielectric layer to create a flat external surface on the dielectric layer. After the flat external surface of the dielectric layer has cooled, it is then covered with a metal conductor layer. The method of the present invention increases the number of sequential buildup layers that may be placed on a sequential buildup substrate.
Abstract:
A fuel cell device includes a housing containing a fuel processor that generates fuel gas and a fuel cell having electrodes forming an anode and cathode, and an ion exchange electrolyte positioned between the electrodes. The housing can be formed as first and second cylindrically configured outer shell sections that form a battery cell that is configured similar to a commercially available battery cell. A thermal-capillary pump can be operative with the electrodes and an ion exchange electrolyte, and operatively connected to the fuel processor. The electrodes are configured such that heat generated between the electrodes forces water to any cooler edges of the electrodes and is pumped by capillary action back to the fuel processor to supply water for producing hydrogen gas. The electrodes can be formed on a silicon substrate that includes a flow divider with at least one fuel gas input channel that can be controlled by a MEMS valve.
Abstract:
An integrated lid for micro-electro-mechanical system (MEMS) devices is formed from a nitride layer deposited over a cavity containing movable parts for the device. Pillars are formed through openings within large area movable parts to support the lid over those parts. Slides are formed and moved under large etchant openings through the lid to allow the openings to be sealed by sputtering.
Abstract:
A stacked die integrated circuit assembly comprising: 1) a substrate; 2) a first integrated circuit die mounted on the substrate; 3) a copper interposer mounted on the first integrated circuit die; and 4) a second integrated circuit die mounted on the copper interposer. The copper interposer significantly reduces the warping of the stacked die IC assembly caused by the warping of the substrate due to thermal changes in the substrate. The copper interposer has a significantly higher coefficient of thermal expansion than a conventional silicon (Si) interposer. The higher CTE enables the copper interposer to counteract the substrate warping.
Abstract:
028 Light from a laser diode is directed by mirrors on angled surfaces of an optical unit through a first lens at an optical disc. Light returns from the disc on a parallel path through a second lens and is directed at a photodetector. A semiconductor device controls the operation of the laser diode and receives signals form the photodetector for processing. The optical unit is formed from one or two glass elements cut from a larger glass wafer or wafers using photolithographic techniques. The mirrors are formed by thin films deposited on angled glass surfaces formed by selective plasma etching of the wafers. At least one mirror is partially reflective and is formed by depositing a thin film of titanium nitride.
Abstract:
A system and method is disclosed for using a pre-formed film in a transfer molding process of the type that uses a transfer mold to encapsulate portions of an integrated circuit with a molding compound. A film of compliant material is pre-formed to conform the shape of the film to a mold cavity surface of the transfer mold. The pre-formed film is then placed adjacent to the surfaces of the mold cavity of the transfer mold. The mold cavity is filled with molding compound and the integrated circuit is encapsulated. The preformation of the film allows materials to be used that are not suitable for use with prior art methods.
Abstract:
Silver interconnects (118) are formed by etching deep grooves (114) into an insulating layer (112) over the contact regions, exposing portions of the contact regions and defining the interconnects. The grooves (114) are etched with a truncated V- or U-shape, wider at the top than at any other vertical location, and have a minimum width of 0.25 µm or less. An optional adhesion layer and a barrier layer are sputtered onto surfaces of the groove, including the sidewalls, followed by sputter deposition of a seed layer. Where aluminum is employed as the seed layer, a zincating process may then be optionally employed to promote adhesion of silver to the seed layer. The groove (114) is then filled with silver (116) by plating in a silver solution, or with silver and copper by plating in a copper solution followed by plating in a silver solution. The filled groove (114) which results does not exhibit voids ordinarily resulting from sputter deposition of metal into such narrow, deep grooves, although seams may be intermittently present in portions of the filled groove where metal plated from the opposing sidewalls did not fuse flawlessly at the point of convergence. Portions of the silver (116) and other layers above the insulating material (112) are then removed by chemical-mechanical polishing, leaving a silver interconnect (118) connected to the exposed portion of the contact region (110) and extending over adjacent insulating regions to another contact region or a bond pad. Silver interconnects (118) thus formed may have smaller cross-sections, and thus a greater density in a given area, than conventional metallic interconnects.