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11.发明授权Monolithically integrated selector for electrically programmable memory cells devices 失效用于电可编程存储单元器件单片集成开关
公开(公告)号：EP0961288B1
公开(公告)日：2004-05-19
申请号：EP98830332.7
申请日：1998-05-29
Applicant: STMicroelectronics S.r.l.
Inventor： Manstretta, Alessandro , Pierin, Andrea , Torelli, Guido
IPC: G11C16/06
CPC classification number: G11C16/12
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12.发明公开A/D conversion method in high density multilevel non-volatile memory devices and corresponding converter device 有权在非易失性更通常高密度存储器和相关联的换能器为模拟/数字转换的方法
公开(公告)号：EP1211812A3
公开(公告)日：2003-02-12
申请号：EP00127649.2
申请日：2000-11-23
Applicant: STMicroelectronics S.r.l.
Inventor： Micheloni, Rino , Khouri, Osama , Pierin, Andrea , Gregori, Stefano , Torelli, Guido
CPC classification number: G11C11/56 , G11C27/005 , H03M1/146 , H03M1/361
Abstract: The invention relates to an analog-to-digital conversion method and relevant device, in high-density multilevel non-volatile memory devices. The method applies to multilevel memory cells comprising a floating gate transistor with drain and source terminals; the cell to be read is subjected to a reading operation by applying predetermined bias voltage values to its drain and source terminals, while to its drain terminal is applied a predetermined current value (Iref), and by measuring the value of its gate voltage (Vg). The method of the invention comprises a first conversion phase the most significant bits (MSB) contained in the memory cell, followed by a second conversion phase of the least significant bits (LSB). The first step is completed within a time gap (T1-T0) which corresponds to the rise transient of the gate voltage signal (Vg), while the second step is started at the end of the transient.
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