公开(公告)号：EP1689217A1

公开(公告)日：2006-08-09

申请号：EP06001378.6

申请日：2006-01-24

Applicant: STMicroelectronics S.r.l.

Inventor： Roveda, Marco ,  Villa, Davide ,  Zonca, Romina ,  Ghezzi, Stefano ,  Saltutti, Stefano ,  Costanzo, Luigi

IPC: H05K5/02

CPC classification number: H05K5/026

Abstract: A removable storage device is described comprising at least one substrate (1) whereon a plurality of components (2, 3) are arranged. Advantageously, the removable storage device (10) comprises a casing (4) of the package type suitable to completely cover these components (2, 3) and to form, together with the substrate (1), an external coating of the removable storage device (10).
Moreover, a method is described for assembling at least one removable storage device (10) thus realised.

Abstract translation: 描述了一种可移动存储装置，其包括布置有多个部件（2,3）的至少一个基板（1）。 有利地，可移除存储装置（10）包括适合于完全覆盖这些部件（2,3）并与衬底（1）一起形成可拆卸存储装置的外部涂层的封装类型的壳体（4） （10）。 此外，描述了用于组装由此实现的至少一个可移动存储设备（10）的方法。

公开(公告)号：EP1324393A1

公开(公告)日：2003-07-02

申请号：EP02014408.5

申请日：2002-06-28

Applicant: STMicroelectronics S.r.l.

Inventor： Allessandri Mauro ,  Crivelli, Barbara ,  Zonca, Romina

IPC: H01L29/51

CPC classification number: H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: The invention is a process for manufacturing a non-volatile memory cell having at least one gate region (10), the process comprising the steps of:

depositing a first dielectric layer onto a semiconductor substrate;
depositing a first semiconductor layer (1) onto the first dielectric layer to form a floating gate region of the memory cell; and
defining said floating gate region of the memory cell in the first semiconductor layer (1).

Advantageously in the invention, the manufacturing process further includes the step of:

depositing a second dielectric layer (5) onto the first conductive layer (1), the dielectric layer (5) having a higher dielectric constant than 10.

Also disclosed is a memory cell, which is integrated in a semiconductor substrate and has a gate region (10) that comprises a dielectric layer (5) formed over a first conductive layer (1) and having a higher dielectric constant than 10.

Abstract translation: 本发明是一种用于制造具有至少一个栅极区的非易失性存储单元（10）上的方法，该方法包括以下步骤：沉积到半导体衬底的第一介电层; 到第一电介质层上沉积第一半导体层（1），以形成该存储单元的浮置栅极区域; 和限定在第一半导体层（1）在存储单元的所述浮置栅区。 有利地，在本发明中，制造过程还包括以下步骤：沉积一第二介电层于10所以盘游离缺失（5），其具有（5）到第一导电层（1），所述介电层更高的介电常数的存储器 集成在一个半导体衬底，具有（10）做了栅极区细胞，在所有包括介电层（5）形成在第一导电层（1）和具有大于10 更高的介电常数