Generative adversarial network device and training method thereof

    公开(公告)号:US11574199B2

    公开(公告)日:2023-02-07

    申请号:US16699727

    申请日:2019-12-01

    Abstract: A generative adversarial network device and a training method thereof. The generative adversarial network device includes a generator and a discriminator. The generator is configured to generate a first sample according to an input data; the discriminator is coupled to the generator, and is configured to receive the first sample and be trained based on the first sample; the generator includes a first memristor array serving as a first weight array. The generative adversarial network device can omit a process of adding noise to fake samples generated by the generator, thereby saving training time, reducing resource consumption and improving training speed of the generative adversarial network.

    Signal processing apparatus and signal processing method

    公开(公告)号:US12226216B2

    公开(公告)日:2025-02-18

    申请号:US17412016

    申请日:2021-08-25

    Abstract: A signal processing apparatus and a signal processing method are provided. The signal processing apparatus includes a memristor array, an input circuit, a first switching circuit, a second switching circuit, an output circuit, and a control circuit. The memristor array includes memristor units and is connected to source lines, word lines and bit lines. The control circuit is configured to control the first switching circuit to select at least one source line to apply at least one first signal to the at least one source line respectively, control the second switching circuit to select and activate at least one word line to apply the at least one first signal to a memristor unit corresponding to the at least one word line, and control the output circuit to output a plurality of second signals based on conductivity values of memristors of the memristor array.

    Memristor and preparation method thereof

    公开(公告)号:US12133478B2

    公开(公告)日:2024-10-29

    申请号:US17477119

    申请日:2021-09-16

    Abstract: A memristor and a preparation method thereof are provided. The memristor includes at least one memristive unit, each of the at least one memristive unit includes a transistor and at least one memristive component, the transistor includes a source electrode and a drain electrode; and each of the at least one memristive component includes a first electrode, a resistive layer, a second electrode, and a passivation layer, the first electrode is electrically connected with the source electrode or the drain electrode; the resistive layer is provided between the first electrode and the second electrode; and the passivation layer at least covers a sidewall of the resistive layer.

    Nanowire transistor and manufacturing method thereof

    公开(公告)号:US11594623B2

    公开(公告)日:2023-02-28

    申请号:US17058211

    申请日:2018-08-03

    Abstract: A nanowire transistor and a manufacture method thereof are provided. The nanowire transistor includes a semiconductor wire, a semiconductor layer, a source electrode and a drain electrode. The semiconductor wire includes a first semiconductor material and includes a source region, a drain region, and a channel region, along an axial direction of the semiconductor wire, the channel region is between the source region and the drain region; the semiconductor layer includes a second semiconductor material and covers the channel region of the semiconductor wire; the source electrode is in the source region of the semiconductor wire and is in direct contact with the source region of the semiconductor wire, and the drain electrode is in the drain region of the semiconductor wire and is in direct contact with the drain region of the semiconductor wire.

    Video stitching method and device
    16.
    发明授权

    公开(公告)号:US11538177B2

    公开(公告)日:2022-12-27

    申请号:US17049347

    申请日:2019-12-24

    Abstract: Disclosed are a video stitching method and a video stitching device. The video stitching method is applicable for stitching a first video and a second video, and includes: performing feature extraction, feature matching and screening on a first target frame of the first video and a second target frame of the second video, so as to obtain a first feature point pair set; performing forward tracking on the first target frame and the second target frame, so as to obtain a second feature point pair set; performing backward tracking on the first target frame and the second target frame, so as to obtain a third feature point pair set; and calculating a geometric transformation relationship between the first target frame and the second target frame according to a union of the first feature point pair set, the second feature point pair set and the third feature point pair set.

    Circuit Structure and Driving Method Thereof, Neural Network

    公开(公告)号:US20210174173A1

    公开(公告)日:2021-06-10

    申请号:US16071985

    申请日:2017-11-14

    Abstract: A circuit structure and a driving method thereof, a neural network are disclosed. The circuit structure includes at least one circuit unit, each circuit unit includes a first group of resistive switching devices and a second group of resistive switching devices, the first group of resistive switching devices includes a resistance gradual-change device, the second group of resistive switching devices includes a resistance abrupt-change device, the first group of resistive switching devices and the second group of resistive switching devices are connected in series, in a case that no voltage is applied, a resistance value of the first group of resistive switching devices is larger than a resistance value of the second group of resistive switching devices. The circuit structure utilizes a resistance gradual-change device and a resistance abrupt-change device connected in series to form a neuron-like structure, so as to achieve to simulate functions of a human brain neuron.

    Resistive random access memory and manufacturing method thereof

    公开(公告)号:US10804465B2

    公开(公告)日:2020-10-13

    申请号:US16123234

    申请日:2018-09-06

    Abstract: A resistive random access memory and a manufacture method thereof are provided. The resistive random access memory includes: a first electrode, a second electrode, a resistive layer between the first electrode and the second electrode, and at least one thermal enhanced layer; the thermal enhanced layer is adjacent to the resistive layer, and a thermal conductivity of the thermal enhanced layer is less than a thermal conductivity of the first electrode and a thermal conductivity of the second electrode.

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