公开(公告)号：EP0037260A3

公开(公告)日：1982-04-21

申请号：EP81301313

申请日：1981-03-26

Applicant: VICTOR COMPANY OF JAPAN, LIMITED

Inventor： Ito, Yasuo

IPC: H04L25/52 ,  G11B05/09 ,  H04L07/02

CPC classification number: G11B20/10009 ,  H04L7/033 ,  H04L25/242

Abstract: A data regenerative system adapted to receive data signals transmitted with the Non-Return-to-Zero mode comprises a comparator (10) for comparing the voltage level of the received data with a variable threshold to generate a digital comparator output. D-type flip-flops (DFF1, DFF2) are arranged to receive the comparator output to generate first and second pulses respectively in response to a data strobe clock pulse. The time difference between the first and second pulses is detected by a first subtractor (21, 22, 23) to generate an error voltage which is applied to the comparator (10) as its threshold to keep the crossing points of the eye pattern of the received signal aligned on the threshold level. A variable width monostable multivibrator (MM) is responsive to synchronization pulses to generate the data strobe clock pulses with a duration that is a function of an output of a second subtractor (26, 27, 28) representing the difference between each period of the first and second pulses and one-half period of a third pulse generated by a D-type flip-flop (DFF4) in response to the leading edge transition of the output of the monostable multivibrator (MM) in the presence of the first and second pulses. Output pulses are regenerated in response to the output of the monostable multivibrator in the presence of the comparator output.

公开(公告)号：EP0216329A3

公开(公告)日：1988-10-05

申请号：EP86112962

申请日：1986-09-19

Applicant: Deutsche Thomson-Brandt GmbH

Inventor： Scholz, Werner, Dipl.-Ing.

IPC: G11B20/10 ,  G11B05/09 ,  H04L07/04

CPC classification number: H04L7/06 ,  G11B20/10527 ,  G11B20/12 ,  G11B27/3027 ,  G11B2220/90 ,  G11B2220/913 ,  H04L7/033 ,  H04L7/041 ,  H04L7/046

公开(公告)号：EP0130572A3

公开(公告)日：1987-08-26

申请号：EP84107472

申请日：1984-06-28

Applicant: HITACHI, LTD.

Inventor： Kobayashi, Masaharu ,  Noguchi, Takaharu ,  Arai, Takao ,  Masuda, Michio ,  Yumde, Yasufumi

IPC: G11B05/52 ,  G11B05/09 ,  G11B05/008 ,  H04N05/782 ,  H04N05/92 ,  H04N09/493

CPC classification number: H04N5/78263 ,  G11B5/0086 ,  G11B5/00865 ,  G11B5/531 ,  G11B20/10527 ,  G11B20/1809 ,  H04N5/926 ,  H04N5/9268 ,  H04N9/8063

Abstract: The recording area of the magnetic tape (2-1, 3-4, 6-6) is divided into a first area (4-5) for recording a PCM converted audio signal and a second area (4-4) for recording a PCM converted video information. In recording the audio signal and the video information which have been separately PCM converted, the magnetic tape (2-1, 3-4, 6-6) is wrapped around the rotary heads (3-1, 6-1) so that a wrap angle (ϕ s , ϕ P ) of each of said first (4-5) and second (4-4) areas is less than 90° with respect to the rotary heads (3-1, 6-1) of a predetermined diameter.

公开(公告)号：EP0166461A3

公开(公告)日：1987-05-20

申请号：EP85108976

申请日：1982-11-30

Applicant: NORTHERN TELECOM INC.

Inventor： Oliver, Theodore A. ,  Nelson, David L. ,  Chan, Keat-Lye

IPC: G11B20/10 ,  G11B05/09 ,  G11B05/596 ,  G11B21/10

CPC classification number: G11B5/5965 ,  G11B5/012 ,  G11B5/59616

Abstract: A method for writing a clock track on a magnetic storage medium of a disc system comprising a fixed read/write head, at least one moving read/write head, and means for translating the magnetic storage medium relative to the fixed and the moving heads, whereby information may be written on the medium in the form of magnetic transitions and the magnetic transitions may be read with the fixed and the moving heads, includes the steps of writing a single pair of transitions with the fixed heads, selecting a predetermined number N of transition pairs for a clock track, reading the single pair of transitions to create a single initial electrical pulse, phase-lock looping the initial electrical pulse to a number of electrical pulse to a number of electrical pulses approximately equal to the square root of N, writing an intermediate clock track with the moving head, the intermediate clock track having a number of transition pairs equal to the square root of N, reading the intermediate clock track to create a number of intermediate clock electrical pulses equal to the square root of N, phase-lock looping the intermediate clock electrical pulses to a number of electrical pulses equal to N and writing a clock track with the fixed head having N transition pairs.

公开(公告)号：EP0147963A3

公开(公告)日：1987-02-04

申请号：EP84308530

申请日：1984-12-07

Applicant: White, Rowland Kent

Inventor： White, Rowland Kent

IPC: G11B05/09 ,  G11B20/10

CPC classification number: G11B20/10 ,  G11B5/02 ,  G11B5/09

Abstract: Magnetic recording of a data continuum is effected by means of sequential impulses of recording current. The impulses occur at regular intervals providing samples of the data continuum. The impulses are of very short time duration, in that each impulse extends for only a small fraction of the time interval that is required for a point on the record medium (106) to traverse the effective recording field (115) of the record head (105). The time spacing between impulses is approximately equal to said time interval, thereby providing a magnetic recording continuum corresponding to said data continuum.

公开(公告)号：EP0093969A3

公开(公告)日：1987-01-07

申请号：EP83104173

申请日：1983-04-28

Applicant: SONY CORPORATION

Inventor： Furuya, Tsuneo ,  Hori, Katsuga c/o Sony Gotanda Youth House

IPC: G11B05/09 ,  G11B27/30 ,  H04L01/10 ,  G06F11/10

CPC classification number: H03M13/2924 ,  G11B20/1809 ,  G11B27/3063 ,  G11B27/34 ,  G11B2020/10592 ,  G11B2220/2545 ,  H03M13/15

Abstract: A method and an apparatus for error correction are disclosed. This method essentially comprises the error correction coding processing and the interleaving and de-interleaving processings for digital information data in the subchannels to be transmitted. And the apparatus comprises means for performing those processings. In more detail, the improved method for error correction of the present invention comprises the steps of: dividing digital Information data in one PACKET divided by sync signals into a plurality of PACKs as dividing units; adding a first redundant code for error detection or error correction to each of the dividing units; and interleaving the digital information data in each of the dividing units and the first redundant code for error detection or error correction; whereby the Interleaved data is transmitted together with frame sync signals and main data. The data in the subchannels is coded and Interleaved and then recorded so that the distances between the data become large. Therefore, if errors should occur, the interpolation can be properly done, thereby elevating the error correcting ability without requiring any complicated error correction circuit and any larger buffer memory such as those for the data in the main channel.

公开(公告)号：EP0125534A3

公开(公告)日：1986-10-29

申请号：EP84104566

申请日：1984-04-24

Applicant: GENERAL ELECTRIC COMPANY

Inventor： Skoda, Raymond Edward

IPC: G11B05/09 ,  G11B13/04 ,  G11B11/10

CPC classification number: G11B20/10 ,  G11B11/10504 ,  G11B11/10515 ,  G11B11/10534

Abstract: A thermo-magnetic method for recording of a bit of information in each domain of an amorphous alloy thin-film layer supporting small stable domains. Each domain in the recording layer is first magnetized in a first direction, corresponding to a first binary state, by exposure to a saturation magnetic field. The remaining binary state is temporarily or permanently recorded in a particular domain by heating (to a lower or higher temperature) that domain volume of the recording layer and thereafter cooling the heated domain in the presence of a bias magnetic field of direction opposite to, and magnitude less than, the saturation field. The binary state of each domain is read by interrogation with a beam of energy and utilization of differential effects between the interrogation beam and the direction of the magnetic field in the interrogated domain.

公开(公告)号：EP0101218A3

公开(公告)日：1986-05-14

申请号：EP83304289

申请日：1983-07-25

Applicant: SONY CORPORATION

Inventor： Wilkinson, James Hedley

IPC: G11B05/09 ,  H04N05/94 ,  G06F11/10

CPC classification number: G06F11/102 ,  G06F11/1028 ,  G11B20/1833 ,  H03M13/15

Abstract: A method of correcting errors in binary data comprises associating with each block of data words (W o to W 31 ) a plurality of check words (C o , C,) for use in error detection and correction, each check word (C o , C 1 ) being derived in dependence on all the data words (W o to W 3 ,) in the block and each other check word (C o , C,) associated with the block. One check word (C o ) may be derived by an exclusive-OR addition and the other (C,) or others may be derived using a primitive polynomial generator.

公开(公告)号：EP0129836A3

公开(公告)日：1986-03-12

申请号：EP84107057

申请日：1984-06-19

Applicant: Siemens Aktiengesellschaft

Inventor： Schmidt, Herbert

IPC: H04L25/00 ,  G11B05/09

CPC classification number: G11B20/10222 ,  G11B20/10009 ,  G11B20/1419 ,  G11B20/1423

公开(公告)号：EP0110625A3

公开(公告)日：1985-09-11

申请号：EP83307009

申请日：1983-11-16

Applicant: STORAGE TECHNOLOGY CORPORATION

Inventor： Fitzpatrick, William B.

IPC: G11B05/09 ,  H04L25/49

CPC classification number: G11B20/1426

Abstract: Data pulses (DATA) are encoded in accordance with a 2,7 run length limited code by a simplified circuit comprising three cascaded flip-flops (33, 34, 35) clocking through the data pulses to provide signals A, B and C and two flip-flops (36, 37) clocking through an intermediate signal Y to provide signals D and E. The signal Y is provided by first NAND gates (40) in accordance with the equation Y = ACDE + BD. The encoded signal X is produced by second NAND gates (41) responsive not only to selected flip-flop outputs but to complementary clock signals (-ESR CLOCK, +ESR CLOCK), in accordance with the equation X = (+ESR GLOCK) . (BD) + (-ESR CLOCK) . (BCE + ABE).