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    Method for determining the position of a contact on a touch panel and corresponding system
    192.
    发明公开
    Method for determining the position of a contact on a touch panel and corresponding system 审中-公开
    一种用于确定在触摸屏上的接触的位置和相应的系统的方法

    公开(公告)号：EP2333646A1

    公开(公告)日：2011-06-15

    申请号：EP10188914.5

    申请日：2010-10-26

    Applicant: STMicroelectronics Srl

    Inventor： Virzi', Maria Celvisia Grazia

    IPC: G06F3/043

    CPC classification number: G06F3/0433 ,  G06F3/043

    Abstract: A method for determining the position (O) of a contact on a panel (2) envisages, during a detection operation, detecting vibration signals at a plurality of detection areas fixed with respect to the panel as a function of vibrations generated by the contact; determining detection values of temporal differences (Δtf) between times of detection of the vibrations at pairs of said detection areas; and determining the position of the contact as a function of said temporal differences. A characterization operation, preceding that of detection, envisages defining contact areas (key1-keyn) on the panel (2) and associating to these contact areas respective ranges of admissible values for the temporal differences (Δtf). In order to determine the position of the contact in a given contact area, the membership of the detection values of the temporal differences to the respective ranges of admissible values of the given contact area is verified.

    Abstract translation: 用于接触的确定性采矿位置（O）在面板上的方法，（2）设想，检测手术期间，在固定相对于所述面板由接触产生的振动的功能检测区域一个多元化检测振动信号; 的检测在对所述检测区域的振动的时间之间的时间差（“TF）确定性采矿检测值; 和确定性采矿接触作为所述时间差的函数的位置。 所述面板（2）上的一个表征手术，preceding-做检测，设想限定接触区（KEY1-keyn）和相关联来合成的接触区域为所述时间差（“TF）的容许值的respectivement范围。 为了确定矿在给定的接触区域接触的位置，的时间差以给定的接触面积的容许值的范围respectivement的检测值的成员进行验证。

    Method for biasing an EEPROM non-volatile memory array and corresponding EEPROM non-volatile memory device
    195.
    发明公开
    Method for biasing an EEPROM non-volatile memory array and corresponding EEPROM non-volatile memory device 有权
    偏置非易失性EEPROM存储器阵列和对应的非易失性EEPROM存储器阵列的方法

    公开(公告)号：EP2302635A1

    公开(公告)日：2011-03-30

    申请号：EP09425359.8

    申请日：2009-09-18

    Applicant: STMicroelectronics Srl

    Inventor： Lo Giudice, Gianbattista ,  Castaldo, Enrico ,  Conte, Antonino

    IPC: G11C16/04 ,  G11C16/10 ,  G11C16/16

    CPC classification number: G11C16/0433 ,  G11C16/10 ,  G11C16/16

    Abstract: Described herein is a method for biasing an EEPROM array (10) formed by memory cells (2) arranged in rows and columns, each operatively coupled to a first switch (3) and to a second switch (4) and having a first current-conduction terminal selectively connectable to a bitline (BL) through the first switch (3) and a control terminal selectively connectable to a gate-control line (Cgt) through the second switch (4), wherein associated to each row are a first wordline (WL seltr) and a second wordline (WL bsw), connected to the control terminals of the first switches (3) and, respectively, of the second switches (4) operatively coupled to the memory cells (2) of the same row. The method envisages selecting at least one memory cell (2) for a given memory operation, biasing the first wordline and the second wordline of the row associated thereto, and in particular biasing the first and second wordlines with voltages different from one another and having values that are higher than an internal supply voltage (V DD ) and are a function of the given memory operation.

    Abstract translation: 在描述了一种用于EEPROM阵列的偏压（10）的存储单元（2）形成排列成行和列，每个可操作地耦合到第一开关的方法（3）和第二开关（4），并具有第一电流 - 导通端子选择性地连接到穿过所述第二开关与第一开关（3）和控制端子选择性地连接到栅极控制线（CGT）的位线（BL）（4），相关联的各行worin是第一字线（ WL seltr）和第二字线（WL BSW），分别连接到第一开关（3）和，的控制端子，所述第二开关（4），其可操作地耦合到同一行的存储单元（2）。 该方法设想选择至少一个存储单元（2）对于给定的存储器操作，偏置第一字线和列与其相关联的第二个字线，且在特定偏置与彼此和具有值的不同电压下的第一和第二字线 并比内部电源电压（V DD）和更高的给定的存储器操作的功能。

    Method for multilevel programming of phase change memory cells using a percolation algorithm
    197.
    发明公开
    Method for multilevel programming of phase change memory cells using a percolation algorithm 有权
    用于编程相变存储器单元与使用Perkolationsalgorithmus多个存储器级方法

    公开(公告)号：EP2249351A1

    公开(公告)日：2010-11-10

    申请号：EP10173621.3

    申请日：2005-06-03

    Applicant: STMicroelectronics Srl

    Inventor： Pirovano, Agostino ,  Pellizzer, Fabio

    IPC: G11C11/56 ,  G11C16/02 ,  H01L45/00

    CPC classification number: G11C11/5678 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0054 ,  G11C2013/0078 ,  G11C2013/0083 ,  G11C2013/009 ,  G11C2213/79

    Abstract: A method and apparatus for programming a phase change memory cell (2) is disclosed. A phase change memory cell (2) includes a memory element (10) of a phase change material having a first state ("11"), in which the phase change material is crystalline and has a minimum resistance level, a second state ("00") in which the phase change material is amorphous and has a maximum resistance level, and a plurality of intermediate states with resistance levels there between. The method includes using programming pulses to program the phase change memory cell (2) in either the set, reset, or one of the intermediate states. To program in the intermediate states, a programming pulse creates a crystalline percolation path having an average diameter (D) through amorphous phase change material and a second programming pulse modifies the diameter (D) of the crystalline percolation path to program the phase change memory cell to the proper current level.

    Abstract translation: 一种用于编程相变存储器单元（2）的方法和装置是游离缺失盘。 一种相变存储单元（2）包括相变材料的具有第一状态（“11”）的存储元件（10），（其中，所述相变材料是结晶的，并具有最小电阻水平，第二状态“ 00“），其中所述相变材料是无定形的并且具有最大电阻水平，并且中间状态具有抗性水平存在之间的多个。 该方法包括使用编程脉冲到相变存储器单元（2）的任一组进行编程，重置或中间状态中的一个。 在中间状态编程，在编程脉冲创建具有平均直径（D）通过非晶相变材料和第二编程脉冲的结晶渗滤路径修改结晶渗滤路径的直径（D）的相变存储单元进行编程 到适当的电流电平。

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