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    HIGH SPEED, CONTROLLED IMPEDANCE AIR DIELECTRIC ELECTRONIC BACKPLANE SYSTEMS
    211.
    发明申请
    HIGH SPEED, CONTROLLED IMPEDANCE AIR DIELECTRIC ELECTRONIC BACKPLANE SYSTEMS 审中-公开
    高速，受控阻抗空气介电电子背板系统

    公开(公告)号：WO03034636A2

    公开(公告)日：2003-04-24

    申请号：PCT/US0233495

    申请日：2002-10-18

    Applicant: ELCO RICHARD A

    Inventor： ELCO RICHARD A ,  LEMKE TIMOTHY

    IPC: H01P3/08 ,  H05K1/14 ,  H05K3/10 ,  H04L

    CPC classification number: H05K1/024 ,  H01P3/08 ,  H05K1/14 ,  H05K3/10 ,  H05K3/202 ,  H05K2201/044 ,  H05K2201/09318

    Abstract: The invention is a novel backplane interconnection system (5) that is useful in the telecommunication and data process industries for ultra high speed backplane systems. It is capable of transmitting digital signals with bandwidths of 10GHz and beyond. The invention provides high performance at a low cost of manufacture. It is suitable for use in a wide variety of system applications. One embodiment of the invention comprises an air dielectric and copper conductor matched impedance transmission line system (15) that interconnects daughter cards in a conventional backplane configuration. The high speed transmission-line structure is continuous through the backplane-daughter card and return path. Such embodiments are also integrated with conventional printed circuit backplanes or can be a stand-alone device.

    Abstract translation: 本发明是一种新颖的背板互连系统（5），其在用于超高速背板系统的电信和数据处理行业中是有用的。 它能够传输10GHz及以上带宽的数字信号。 本发明以低成本制造提供高性能。 它适用于各种系统应用。 本发明的一个实施例包括空气介质和铜导体匹配阻抗传输线路系统（15），其在常规背板配置中互连子卡。 高速传输线结构通过背板 - 子卡和返回路径连续。 这样的实施例也与传统的印刷电路背板集成或可以是独立的装置。

    HIGH FREQUENCY BUS SYSTEM
    212.
    发明申请
    HIGH FREQUENCY BUS SYSTEM 审中-公开
    高频总线系统

    公开(公告)号：WO99017404A1

    公开(公告)日：1999-04-08

    申请号：PCT/US1998/019837

    申请日：1998-09-22

    IPC: G06F13/00 ,  G06F13/40 ,  G11C5/00 ,  G11C5/06 ,  H05K1/02 ,  H05K1/14 ,  H05K7/14 ,  H01R9/09

    CPC classification number: G11C5/063 ,  G06F13/1684 ,  G06F13/4086 ,  G06F13/409 ,  G06F13/4247 ,  G11C5/04 ,  G11C7/1048 ,  H05K1/023 ,  H05K1/0246 ,  H05K1/0248 ,  H05K1/14 ,  H05K7/1459 ,  H05K2201/044 ,  H05K2201/09263 ,  H05K2201/10022 ,  H05K2201/10159 ,  H05K2201/10689

    Abstract: A high frequency bus system (450) which insures uniform arrival times of high fidelity signals to the devices (510), despite the use of the bus (450) on modules (420) and connectors. The high frequency bus system (450) includes a first bus segment having one or more devices (510) connected between a first and second end. The high frequency bus system (450) also includes a second bus segment which has no devices connected to it. The first end of the first segment and the second end of the second segment are coupled in series to form a chain of segments and when two signals are introduced to the first end of the second bus segment at substantially the same time, they arrive at each device (510) connected to the first bus segment at substantially the same time. Conversely when two signals originate at a device (510) substantially at the same time, they arrive at the first end of the second bus segment at substantially the same time. Uniform arrival times hold despite the use of connectors to couple the segments together, despite the segments being located on modules, without the need for stubs, despite the presence of routing turns in the segments and despite the type of information, such as address, data, or control, carried by the signals.

    Abstract translation: 尽管在模块（420）和连接器上使用总线（450），但是高频总线系统（450）确保高保真信号到达设备（510）的均匀到达时间。 高频总线系统（450）包括具有连接在第一和第二端之间的一个或多个设备（510）的第一总线段。 高频总线系统（450）还包括没有与其连接的设备的第二总线段。 第一段的第一端和第二段的第二端串联耦合以形成一段链段，并且当两个信号在基本上同时被引入第二总线段的第一端时，它们到达每个 设备（510）基本上同时连接到第一总线段。 相反，当两个信号基本上在同一时间发生在设备（510）时，它们在几乎相同的时间到达第二总线段的第一端。 尽管使用连接器将段连接在一起，尽管分段位于模块上，而不需要存根，尽管存在段中的路由转换，并且尽管存在诸如地址，数据的信息类型，但是均匀到达时间成立 ，或由信号承载的控制。

    FUTURE BUS BUS TERMINATION NETWORK
    215.
    发明申请
    FUTURE BUS BUS TERMINATION NETWORK 审中-公开
    未来总线总线终端网络

    公开(公告)号：WO1993020519A1

    公开(公告)日：1993-10-14

    申请号：PCT/GB1993000486

    申请日：1993-03-09

    Applicant: CTS CORPORATION UK LTD. ,  RAMSAY, William

    Inventor： CTS CORPORATION UK LTD.

    IPC: G06F13/40

    CPC classification number: H05K1/0246 ,  G06F13/4086 ,  H04L25/0298 ,  H05K1/0231 ,  H05K3/3421 ,  H05K2201/044 ,  H05K2201/10022

    Abstract: A bus termination network as described for terminating transmission lines used with high speed digital backplanes and which meets futurebus+ specifications. The network consists of a plurality of resistors (R) each of which is connected between a hole (15), which receives a connector, and a common junction (22) which is connected to a 2.1 voltage supply at connector (26). The junction (22) is connected to ground (24) via a capacitor (20). The resistor network is provided in a surface mount chip (18) provided with gull-wing connectors. Each transmission line is connected through a single resistor R in network package (18) so that the signal on the transmission line is decoupled from a 2.1 voltage supply and capacitor (20) decouples the resistors (R) from ground (24).

    Abstract translation: 一种总线终端网络，用于终止与高速数字背板一起使用的传输线，并符合futurebus +规范。 网络由多个电阻器（R）组成，每个电阻器（R）连接在接纳连接器的孔（15）和连接到连接器（26）上的2.1电压源的公共接点（22）之间。 结（22）经由电容器（20）连接到地（24）。 电阻网络设置在设置有鸥翼连接器的表面安装芯片（18）中。 每个传输线通过网络封装（18）中的单个电阻器R连接，使得传输线上的信号与2.1电压源解耦，电容器（20）将电阻器（R）与地（24）分离。

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