224.
    发明专利
    未知

    公开(公告)号:DE602006011693D1

    公开(公告)日:2010-03-04

    申请号:DE602006011693

    申请日:2006-10-10

    Abstract: A single sideband mixer circuit includes a voltage controlled oscillator operable to provide a tunable frequency f1. The mixer circuit outputs a frequency signal at a frequency f1 ± f2. A tracking filter operates to filter the frequency signal and generate a first output signal at the frequency f1 ± f2. A resonance frequency fr of the tracking filter is tunable to substantially match the frequency f1 ± f2 of the frequency signal. The output signal of the tracking filter may be processed by a phase lock loop circuit to generate a control signal for controlling the setting of the tunable frequency f1 and resonance frequency fr. Alternatively, the output signal of the tracking filter may be divided and the divided signal processed by a phase lock loop circuit to generate the control signal for controlling setting of the tunable frequency f1 and resonance frequency fr.

    225.
    发明专利
    未知

    公开(公告)号:DE69941866D1

    公开(公告)日:2010-02-11

    申请号:DE69941866

    申请日:1999-02-17

    Abstract: A structure and method for creating an integrated circuit passivation (24) comprising, a circuit (16), a dielectric (18), and metal plates (20) over which an insulating layer (26) is disposed that electrically and hermetically isolates the circuit (16), and a discharge layer (32) that is deposited to form a passivation (24) that protects the circuit (16) from electrostatic discharges caused by, e.g., a finger, is disclosed.

    227.
    发明专利
    未知

    公开(公告)号:DE602005015790D1

    公开(公告)日:2009-09-17

    申请号:DE602005015790

    申请日:2005-06-29

    Inventor: FREY CHRISTOPHE

    Abstract: A magnetic random access memory element is made from a first magnetic tunnel junction and a second magnetic tunnel junction. These magnetic tunnel junctions are connected to each other in a series resistive circuit. The connected first and second magnetic tunnel junctions are connected to a bit line through an access transistor. A write bit line and a write data line are associated with each of the first and second magnetic tunnel junctions. By application of appropriate currents to these lines, the magnetic vector orientation with each of the first and second magnetic tunnel junctions can be controlled so as to store information within the element in any one of at least three logic states.

    228.
    发明专利
    未知

    公开(公告)号:DE69840907D1

    公开(公告)日:2009-07-30

    申请号:DE69840907

    申请日:1998-10-27

    Abstract: Disclosed is a fault tolerant CMOS image sensor that includes circuitry for identifying defective pixels and masking them during image generation. Masking may involve, in one example, replacing the output of a given pixel with an average of the output of surrounding non-faulty pixels. Thus, while image sensors may be fabricated with some number of faulty pixels, the images produced by such sensors will not have undesirable bright or dark spots. The disclosed sensor includes (a) one or more pixels (active or passive) capable of providing outputs indicative of a quantity of radiation to which each of the one or more pixels has been exposed; and (b) one or more circuit elements electrically coupled to the one or more pixels and configured to identify and correct faulty pixels in the CMOS imager. The one more pixels each include a photodiode diffusion formed in a well and a tap to power or ground also formed in the well. The disclosed sensor also identifies pixels that were initially acceptable but later became defective. The newly defective pixels so identified may then be masked to thereby increase the CMOS detector lifetime.

    229.
    发明专利
    未知

    公开(公告)号:DE602004020419D1

    公开(公告)日:2009-05-20

    申请号:DE602004020419

    申请日:2004-04-30

    Inventor: LEAMING TAYLOR J

    Abstract: An integrated circuit for a smart card may include a transceiver and a controller for cooperating with the transceiver to receive operating requests from a host device. The controller may perform smart card operations based upon respective operating requests. Moreover, the controller also may cooperate with the transceiver to receive at least one advance request from the host device to indicate that at least one operating request will follow. By way of example, the standby operation may include loading data in at least one buffer, which may be sent to the host device based upon receiving the at least one operating request. Other standby operations may include disabling data transmission to the host device, such as when the communications bus of the host device is preoccupied, and ceasing performing a current smart card operation to allow a higher priority smart card operation to be performed, for example.

    230.
    发明专利
    未知

    公开(公告)号:DE60137188D1

    公开(公告)日:2009-02-12

    申请号:DE60137188

    申请日:2001-12-19

    Abstract: There is disclosed a data processor having a clustered architecture that comprises at least one branching cluster, at least one non-branching cluster and remote conditional branching control circuitry. Each of the clusters is capable of computing branch conditions, though only the branching cluster is operable to perform branch address computations. The remote conditional branching control circuitry, which is associated with each of the clusters, is operable in response to sensing a conditional branch instruction in a non-branching cluster to (i) cause the branching cluster to compute a branch address and a next program counter address, (ii) cause the non-branching cluster to compute a branch condition, and (iii) communicate the computed branch condition from the non-branching cluster to the branching cluster. The- data processor then uses the computed branch condition to select one of the branch address or the next program counter address.

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