公开(公告)号：WO2006019914A2

公开(公告)日：2006-02-23

申请号：PCT/US2005/024997

申请日：2005-07-14

Applicant: INTEL CORPORATION ,  BRANDT, Jason ,  MONDAL, Sanjoy, K. ,  UHLIG, Richard ,  NEIGER, Gilbert ,  GEORGE, Robert

Inventor： BRANDT, Jason ,  MONDAL, Sanjoy, K. ,  UHLIG, Richard ,  NEIGER, Gilbert ,  GEORGE, Robert

IPC: G06F12/10

CPC classification number: G06F12/1036 ,  G06F9/45533 ,  G06F9/45558 ,  G06F9/4843 ,  G06F12/0292 ,  G06F12/0804 ,  G06F12/0891 ,  G06F12/1027 ,  G06F12/1063 ,  G06F12/109 ,  G06F12/12 ,  G06F12/123 ,  G06F2009/45583 ,  G06F2009/45591 ,  G06F2212/1016 ,  G06F2212/152 ,  G06F2212/30 ,  G06F2212/50 ,  G06F2212/604 ,  G06F2212/657 ,  G06F2212/68 ,  G06F2212/683 ,  G06F2212/684 ,  G06F2212/69 ,  G06F2212/70

Abstract: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced.

Abstract translation: 在本发明的一个实施例中，一种方法包括在第一地址空间和第二地址空间之间切换，确定地址空间列表中是否存在第二地址空间; 并且在切换之后保持翻译缓冲器中的第一地址空间的条目。 以这种方式，可以减少与这种上下文切换相关联的开销。

公开(公告)号：WO2006019614A2

公开(公告)日：2006-02-23

申请号：PCT/US2005/024253

申请日：2005-07-08

Applicant: INTEL CORPORATION ,  SUTTON, James, II ,  HALL, Clifford ,  BRICKELL, Ernie ,  GRAWROCK, David

Inventor： SUTTON, James, II ,  HALL, Clifford ,  BRICKELL, Ernie ,  GRAWROCK, David

CPC classification number: H04L63/083 ,  G06F9/4843 ,  G06F12/1036 ,  G06F21/57 ,  G06F21/73 ,  H04L9/0897 ,  H04L9/3218 ,  H04L9/3236 ,  H04L63/04

Abstract: Delivering a Direct Proof private key in a signed group of keys to a device installed in a client computer system in the field may be accomplished in a secure manner without requiring significant non-volatile storage in the device. A unique pseudo-random value is generated and stored along with a group number in the device at manufacturing time. The pseudo-random value is used to generate a symmetric key for encrypting a data structure holding a Direct Proof private key and a private key digest associated with the device. The resulting encrypted data structure is stored in a signed group of keys (e.g., a signed group record) on a removable storage medium (such as a CD or DVD), and distributed to the owner of the client computer system. When the device is initialized on the client computer system, the system checks if a localized encrypted data structure is present in the system. If not, the system obtains the associated signed group record of encrypted data structures from the removable storage medium, and verifies the signed group record. The device decrypts the encrypted data structure using a symmetric key regenerated from its stored pseudo-random value to obtain the Direct Proof private key, when the group record is valid. If the private key is valid, it may be used for subsequent authentication processing by the device in the client computer system.

Abstract translation: 将已签名的密钥组中的直接证明私钥传递给安装在客户端计算机系统中的设备可以以安全的方式完成，而不需要设备中的重要的非易失性存储。 生产时会生成一个唯一的伪随机值，并将其与组号一起存储在设备中。 伪随机值用于生成一个对称密钥，用于加密持有直接证明私钥和与设备关联的私钥摘要的数据结构。 得到的加密数据结构被存储在可移动存储介质（诸如CD或DVD）上的签名密钥组（例如，签名组记录）中，并被分发给客户端计算机系统的所有者。 当设备在客户端计算机系统上初始化时，系统检查系统中是否存在本地化的加密数据结构。 否则，系统从可移动存储介质中获取加密数据结构的相关签名组记录，并验证签名组记录。 当组记录有效时，设备使用从其存储的伪随机值再生的对称密钥来解密加密的数据结构以获得直接证明私钥。 如果私钥有效，则可以将其用于客户端计算机系统中的设备的后续验证处理。

公开(公告)号：WO2004099997A9

公开(公告)日：2005-10-27

申请号：PCT/GB2004001971

申请日：2004-05-06

Applicant: IBM ,  IBM UK ,  SLEGEL TIMOTHY JOHN ,  HELLER LISA ,  PFEFFER ERWIN ,  PLAMBECK KENNETH

Inventor： SLEGEL TIMOTHY JOHN ,  HELLER LISA ,  PFEFFER ERWIN ,  PLAMBECK KENNETH

IPC: G06F9/30 ,  G06F9/38 ,  G06F12/08 ,  G06F12/10

CPC classification number: G06F12/1027 ,  G06F9/30047 ,  G06F9/3824 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/109

Abstract: Selected units of storage, such as segments of storage or regions of storage, are invalidated. The invalidation is facilitated by the setting of invalidation indicators located in data structure entries corresponding to the units of storage to be invalidated. Additionally, buffer entries associated with the invalidated units of storage or other chosen units of storage are cleared. An instruction is provided to perform the invalidation and/or clearing. Moreover, buffer entries associated with a particular address space are cleared, without any invalidation. This is also performed by the instruction. The instruction can be implemented in software, hardware, firmware or some combination thereof, or it can be emulated.

Abstract translation: 所选存储单元（如存储区域或存储区域）无效。 通过设置位于与要被无效的存储单元相对应的数据结构条目中的无效指示符来促进无效。 此外，清除与无效存储单元或其他所选存储单元相关联的缓冲区条目。 提供了执行无效和/或清除的指令。 此外，与特定地址空间相关联的缓冲区条目将被清除，无任何无效。 这也由指令执行。 该指令可以以软件，硬件，固件或其某种组合来实现，或者可以被仿真。

公开(公告)号：WO2005078590A2

公开(公告)日：2005-08-25

申请号：PCT/US2005001234

申请日：2005-01-14

Applicant: INTEL CORP ,  O'CONNOR DENNIS

Inventor： O'CONNOR DENNIS

IPC: G06F12/10

CPC classification number: G06F12/1036 ,  G06F2212/656

Abstract: According to some embodiments, a memory management unit receives a virtual address and provides a corresponding physical address. The memory management unit stores generated virtual address-to-physical address translations. If a virtual address-to-physical address translation is available for a particular virtual address, the memory management unit retrieves the corresponding physical address. If a translation is not available, the memory management unit generates the corresponding physical address from the virtual address. The memory management unit converts the virtual address to a modified virtual address using a process identifier and then performs a page table walk using the modified virtual address, generating the physical address.

Abstract translation: 根据一些实施例，存储器管理单元接收虚拟地址并提供对应的物理地址。 存储器管理单元存储生成的虚拟地址到物理地址转换。 如果虚拟地址到物理地址转换可用于特定虚拟地址，则存储器管理单元检索对应的物理地址。 如果翻译不可用，则内存管理单元从虚拟地址生成相应的物理地址。 存储器管理单元使用进程标识符将虚拟地址转换为修改的虚拟地址，然后使用修改的虚拟地址执行页表行进，生成物理地址。

公开(公告)号：WO2004066093A2

公开(公告)日：2004-08-05

申请号：PCT/US2004/001711

申请日：2004-01-21

Applicant: INTELITRAC, INC.

Inventor： CHEN, Tianlong ,  VU, Jonathon ,  WANG, Yingbin

IPC: G06F

CPC classification number: G06F12/0284 ,  G06F11/1666 ,  G06F11/20 ,  G06F11/2056 ,  G06F11/2069 ,  G06F12/1036 ,  G06F12/1072

Abstract: A Distributed Memory Computing Environment (herein called "DMCE") architecture and implementation is disclosed in which any computer equipped with a memory agent can borrow memory from other computer(s) equipped with a memory server on a distributed network. A memory backup and recovery as an optional subsystem of the Distributed Memory Computing system is also disclosed. A Network Attached Memory (herein called "NAM" or "NAM Box" or "NAM Server") appliance is disclosed as a dedicated memory-sharing device attached to a network. A Memory Area Network (herein called "MAN") is further disclosed, such a network is a network of memory device(s) or memory server(s) which provide memory sharing service to memory-demanding computer(s) or the like, when one memory device or memory server fails, its service will seamlessly transfer to other memory device(s) or memory server(s).

Abstract translation: 公开了一种分布式存储器计算环境（这里称为“DMCE”）架构和实现方式，其中配备有存储器代理的任何计算机可以借用来自在分布式网络上配备有存储器服务器的其它计算机的存储器。 还公开了作为分布式存储器计算系统的可选子系统的存储器备份和恢复。 网络连接存储器（这里称为“NAM”或“NAM盒”或“NAM服务器”）设备被公开为附接到网络的专用存储器共享设备。 进一步公开了存储器区域网络（这里称为“MAN”），这样的网络是向存储器要求苛刻的计算机等提供存储器共享服务的存储器设备或存储器服务器的网络， 当一个存储设备或存储器服务器出现故障时，其服务将无缝传输到其他存储设备或存储器服务器。

公开(公告)号：WO01035225A1

公开(公告)日：2001-05-17

申请号：PCT/SE2000/002206

申请日：2000-11-10

IPC: G06F12/10

CPC classification number: G06F12/1036 ,  G06F12/109

Abstract: A computer system uses paged memory mapping techniques to maintain speculative data generated by concurrent execution of speculative jobs. In some embodiments, a set of shared virtual pages is defined that stores data that are shared by a first job and a second job. A set of shared physical pages in the paged physical memory is also defined, wherein there is a one-to-one correspondence between the set of shared virtual pages and the set of shared physical pages. When a job is to generate speculative data, a private physical page in which the data is to reside is created. The contents of the corresponding shared physical page are copied to the private physical page, and the speculative job's accesses are then mapped to the private physical page instead of to the shared physical page. If speculation fails, the private page may be discarded, and the job restarted. If speculation succeeds, memory mapping is adjusted so that the private page replaces the formerly shared physical page.

Abstract translation: 计算机系统使用分页内存映射技术来维护通过并发执行投机作业生成的投机数据。 在一些实施例中，定义了一组共享虚拟页面，其存储由第一作业和第二作业共享的数据。 还定义了分页物理存储器中的一组共享物理页面，其中在该组共享虚拟页面和一组共享物理页面之间存在一对一的对应关系。 当作业生成推测数据时，将创建数据所在的私有物理页面。 相应的共享物理页面的内容将被复制到私有物理页面，然后将推测作业的访问映射到私有物理页面，而不是映射到共享物理页面。 如果投机失败，私人页面可能会被丢弃，并重新启动该作业。 如果推测成功，则调整内存映射，以便私有页面替换以前共享的物理页面。

公开(公告)号：WO1998021712A2

公开(公告)日：1998-05-22

申请号：PCT/US1997020610

申请日：1997-11-12

Applicant: IDEA CORPORATION

Inventor： IDEA CORPORATION ,  YAMADA, Koichi ,  HAMMOND, Gary, Neil

IPC: G11B00/00

CPC classification number: G06F12/1036 ,  G06F2212/681

Abstract: A method and an apparatus for translating a virtual address into a physical address in a multiple region virtual memory environment. In one embodiment, a translation lookside buffer (TLB) is configured to provide page table entries to build a physical address. The TLB is supplemented with a virtual hash page table (VHPT) to provide TLB entries in the occurrences of TLB misses. An alternate software replacement scheme may be utilized on a per region basis instead of the default page table walk of the VHPT with a dedicated bit associated with each particular region of the disclosed virtual address space. A VHPT walk is performed only if the particular bit for the particular region and a master enable bit are both enabled. Otherwise, the alternate software replacement routine is performed to provide TLB replacements in the occurrences of TLB misses.

Abstract translation: 一种在多区域虚拟存储器环境中将虚拟地址转换为物理地址的方法和装置。 在一个实施例中，翻译后端缓冲器（TLB）被配置为提供页表条目以建立物理地址。 TLB补充有虚拟散列页表（VHPT），以在出现TLB未命中时提供TLB条目。 替代软件替换方案可以在每个区域的基础上使用，而不是使用与所公开的虚拟地址空间的每个特定区域相关联的专用位的VHPT的默认页面表。 仅当特定区域的特定位和主使能位都被使能时才执行VHPT步行。 否则，执行替代软件替换例程以在TLB未命中的发生中提供TLB替换。

公开(公告)号：WO1985000451A1

公开(公告)日：1985-01-31

申请号：PCT/US1984000852

申请日：1984-06-04

Applicant: AMERICAN TELEPHONE & TELEGRAPH COMPANY

Inventor： AMERICAN TELEPHONE & TELEGRAPH COMPANY ,  HO, Gary, Shiu-Fan ,  PETERSON, Ralph, Warren

IPC: G06F12/10

CPC classification number: G06F12/1036

Abstract: A demand paging scheme for a shared memory processing system that uses paged virtual memory addressing and includes a plurality of address translation buffers (ATBs) (104, 105). Page frames of main memory (100) that hold pages being considered for swapping from memory are sequestered and flags, one corresponding to each ATB in the system, are cleared. Each time an ATB is flushed, its associated flag is set. Setting of all the flags indicates that the address translation information of pages held by selected sequestered page frames does not appear in any ATB and that the selected pages may be swapped from main memory.

Abstract translation: 一种用于共享存储器处理系统的请求寻呼方案，其使用分页的虚拟存储器寻址并包括多个地址转换缓冲器（ATF）（104,105）。 存储被认为用于从存储器交换的页面的主存储器（100）的页面帧被隔离，并且与系统中的每个ATB对应的标志被清除。 每当ATB被刷新时，它的关联标志被置位。 所有标志的设置表示由选定的隔离页面帧保持的页面的地址转换信息不会出现在任何ATB中，并且所选择的页面可能与主存储器交换。

公开(公告)号：CZ9500016A3

公开(公告)日：1996-02-14

申请号：CZ1695

申请日：1995-01-03

Applicant: INTEL CORP

Inventor： HUCK KAMLA P ,  RODGERS SCOTT D ,  GLEW ANDREW F

IPC: G06F9/34 ,  G06F12/02 ,  G06F12/08 ,  G06F12/10

CPC classification number: G06F12/1036 ,  G06F12/0292

公开(公告)号：KR20180013930A

公开(公告)日：2018-02-07

申请号：KR20177034306

申请日：2016-04-29

IPC: G06F12/0846 ,  G06F12/1036 ,  G06F12/109

CPC classification number: G06F12/0848 ,  G06F12/1036 ,  G06F12/109 ,  G06F12/12 ,  G06F2212/1016 ,  G06F2212/1028 ,  G06F2212/282 ,  G06F2212/50 ,  G06F2212/601 ,  G06F2212/68 ,  G06F2212/70 ,  Y02D10/13

Abstract: MMU(memory management unit) 파티셔닝된변환캐시들, 및관련장치들, 방법들, 및컴퓨터-판독가능한매체들이제공된다. 이와관련하여, 일양상에서, MMU를포함하는장치가제공된다. MMU는어드레스변환맵핑을정의하는복수의변환캐시엔트리들을제공하는변환캐시를포함한다. MMU는, 각각이복수의변환캐시엔트리들중 하나또는그 초과의변환캐시엔트리들을포함하는대응하는복수의파티션들을정의하는복수의파티션디스크립터들을제공하는파티션디스크립터테이블을더 포함한다. MMU는또한, 요청자로부터메모리액세스요청을수신하도록구성된파티션변환회로를포함한다. 파티션변환회로는, 메모리액세스요청의 TCPID(translation cache partition identifier)를결정하고, TCPID에기반하여복수의파티션들중 하나또는그 초과의파티션들을식별하고, 그리고하나또는그 초과의파티션들의변환캐시엔트리상에서메모리액세스요청을수행하도록추가로구성된다.

Abstract translation: 提供了存储器管理单元（MMU）分区翻译缓存以及相关设备，方法和计算机可读介质。 就此而言，在所有方面中，提供了一种包括MMU的装置。 MMU包括提供定义地址翻译映射的多个翻译缓存条目的翻译缓存。 MMU进一步包括分区描述符表，该分区描述符表提供多个分区描述符，每个分区描述符定义对应的多个分区，包括多个翻译缓存条目中的一个或多个翻译缓存条目。 MMU还包括配置成从请求者接收存储器访问请求的分区转换电路。 分区转换电路确定存储器访问请求的转换缓存分区标识符（TCPID），基于TCPID识别多个分区中的一个或多个分区，并且在一个或多个分区上标识分区' 并且被进一步配置为执行存储器访问请求。