公开(公告)号：EP1098283A3

公开(公告)日：2002-04-24

申请号：EP00114917.8

申请日：2000-07-17

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： Marneweck, Willem J. ,  van Niekerk, Johannes Albertus

IPC: E05B49/00 ,  G07C9/00

CPC classification number: G07C9/00309 ,  B60R25/2072 ,  B60R25/24 ,  B60R2325/105 ,  G07C2009/00373 ,  G07C2009/00793

Abstract: A passive signal discriminator for preventing activation by undesired signals of low power transponder circuits in a keyless entry system. These undesired signals may be noise or interfering signals. An asymmetrical low pass filter is used to determine the presence of a signal having a defined length of time. The asymmetrical filter has a longer charge time then discharge time, thereby being adapted to quickly discharge upon the loss of a signal. The passive signal discriminator does not require power from a power source to operate.

公开(公告)号：EP1145123A2

公开(公告)日：2001-10-17

申请号：EP00913584.9

申请日：2000-02-23

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： SMIT, Willem ,  HOFHINE, Paul ,  ROGERS, Clark

IPC: G06F11/00

CPC classification number: H01L23/544 ,  H01L2223/5444 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit having a microcontroller, mask programmed read only memory, functions such as clock oscillator, analog-to-digital converter, timers, etc., where each may be adjusted with a digital input to a desired calibration value. The digital input resulting in the desired calibration value being stored in a programmable fuse array.

公开(公告)号：EP1142114A2

公开(公告)日：2001-10-10

申请号：EP00967353.4

申请日：2000-04-26

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： NOLAN, James, B. ,  ELLISON, Ryan, Scott

IPC: H03K3/00

CPC classification number: H03K3/0231 ,  G05F3/245 ,  H03K3/011

Abstract: Several calibration techniques for a precision relaxation oscillator with temperature compensation produces a stable clock frequency over wide variations of ambient temperature. The calibration techniques provide for different methods of determining CTAT current, PTAT current or the ratio of PTAT current to CTAT current. The calibration techniques provide different methods for determining CTAT and PTAT calibration values and for setting CTAT and PTAT calibration select switches.

公开(公告)号：EP1138078A1

公开(公告)日：2001-10-04

申请号：EP00977277.3

申请日：2000-09-28

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： FERNANDEZ, Joseph

IPC: H01L23/495

CPC classification number: H01L23/49513 ,  H01L23/49551 ,  H01L24/32 ,  H01L2224/32245 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00

Abstract: The method which applies to plastic encapsulated integrated circuit packages comprises the steps of increasing the thickness of the epoxy adhesive that is used to couple an integrated circuit die to a mounting structure and reducing the thickness of the integrated circuit die. Each step may be taken independently or concurrently.

公开(公告)号：EP1137012A2

公开(公告)日：2001-09-26

申请号：EP01106031.6

申请日：2001-03-12

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： Gerber, Donald S. ,  Shields, Jeffrey ,  Hewitt, Kent D. ,  Davies, David M

IPC: G11C16/10 ,  G11C16/14

CPC classification number: G11C16/3427 ,  G11C16/10 ,  G11C16/14 ,  G11C16/3418 ,  G11C2216/28

Abstract: A method of writing and selectively erasing bits in a selected group of memory cells that significantly reduces the likelihood of disturbing data stored in other, non-selected groups of memory cells is disclosed. The method varies the bias voltages applied to bit lines in unselected cells depending upon the selected or non-selected state of the cells. This reduces the voltage differential applied to the unselected cells, reducing the possibility of inadvertently causing unwanted changes in the amount of charge stored on the respective floating gates of the unselected cells. The method of the present invention improves electrical isolation between columns of cells without increasing the distance between the cells.

Abstract translation: 公开了一种写入和选择性地擦除所选存储器单元组中的位的方法，其显着地降低了存储在其它未选择的存储器单元组中的数据的干扰的可能性。 该方法根据所选择的或未选择的单元状态改变施加到未选择单元中的位线的偏置电压。 这降低了施加到未选择的单元的电压差，减少了无意中引起存储在未选择单元的相应浮动栅极上的电荷量的不期望的变化的可能性。 本发明的方法改善了电池列之间的电隔离，而不增加电池之间的距离。

公开(公告)号：EP1134806A2

公开(公告)日：2001-09-19

申请号：EP01103220.8

申请日：2001-02-12

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： Fernandez, Joseph ,  Richardson, David Alan ,  Termer, Dan

IPC: H01L23/495

CPC classification number: H01L24/32 ,  H01L23/49513 ,  H01L23/49544 ,  H01L23/49548 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32057 ,  H01L2224/32245 ,  H01L2224/83136 ,  H01L2224/8319 ,  H01L2224/83385 ,  H01L2224/8385 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/078 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/3512

Abstract: A method for attaching an integrated circuit die to a mounting structure, the method having the steps of: forming a mounting structure having a die pad and at least one spreader; applying an adhesive to the die pad and the at least one spreader of the mounting structure; and attaching the integrated circuit die to the adhesive, wherein the at least one spreader is between the die pad and the integrated circuit die. Also, an integrated circuit package having: a mounting structure having a die pad and at least one spreader; an adhesive adhered to the die pad and the at least one spreader of the mounting structure; and an integrated circuit die adhered to the adhesive, wherein the at least one spreader is between the die pad and the integrated circuit die. Finally, a mounting structure for an integrated circuit die, the mounting structure comprising: a die pad for supporting the integrated circuit die; and at least one spreader for supporting the integrated circuit die at a distance from the die pad.

公开(公告)号：EP1090425A1

公开(公告)日：2001-04-11

申请号：EP00918141.3

申请日：2000-03-17

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： GERBER, Donald, S. ,  YACH, Randy, L. ,  HEWITT, Kent, D. ,  SPADINI, Gianpaolo

IPC: H01L27/115 ,  H01L21/8247

CPC classification number: H01L27/11521 ,  G11C16/0416 ,  H01L27/0207 ,  H01L27/11519

Abstract: An array of P-channel memory cells is separated into independently programmable memory segments by creating multiple, electrically isolated N-wells upon which the memory segments are fabricated. The methods for creating the multiple, electrically isolated N-wells include p-n junction isolation and dielectric isolation.

公开(公告)号：EP0889393A3

公开(公告)日：2001-04-04

申请号：EP98112385.4

申请日：1998-07-03

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： Yach, Randy L.

IPC: G06F9/34 ,  G06F9/30

CPC classification number: H02J13/0027 ,  G06F9/30098 ,  G06F9/30138 ,  G06F9/30185 ,  G06F9/34 ,  G06F12/0623

Abstract: A microcontroller architecture that adds a dedicated bit in the op-code decode field to force data access to take place on page 0 of the random access memory (RAM) for that instruction. This allows the user to have any page selected and still have direct access to the special function registers or the register variables which are located on page 0 of the RAM. The setting of the dedicated bit will not affect the current operation of the microcontroller nor will the setting of the bit modify the currently selected address stored in the op-code instruction currently being executed by the microcontroller.

公开(公告)号：EP1087492A2

公开(公告)日：2001-03-28

申请号：EP00125108.1

申请日：1996-07-17

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： Yach, Randy L. ,  Hull, Richard L.

IPC: H02H3/24 ,  G11C5/14 ,  G11C16/06

CPC classification number: H03K17/223 ,  G11C5/143 ,  H02H3/243 ,  H03K17/145 ,  H03K17/22

Abstract: A power-on reset (10) for resetting electronic circuitry to be monitored has been provided. The power-on reset circuit includes a trip point generator (12) including the worst case component (the component that requires the greatest power supply voltage to operate) within the electronic circuitry for setting the threshold voltage for taking the electronic circuitry out of reset such that if the worst case component is operative, it is guaranteed that all components are operative and, thus, the electronic circuitry can be taken out of reset. Moreover, because the threshold voltage is based upon the worst case component of the electronic circuitry, the threshold voltage of the trip point generator will adequately track the electronic circuitry over normal process and temperature variations. Additionally, the power-on reset circuit includes a noise filter (34) for placing the electronic circuitry back into reset if variations within the power supply voltage cause the power supply voltage level to fall below a predetermined threshold for at least a minimum period of time.

Abstract translation: 已经提供了用于重置要被监视的电子电路的通电重置（10）。 通电复位电路包括跳变点产生器（12），其包括电子电路内的最坏情况分量（需要最大电源电压工作的分量），用于设置用于使电子电路脱离复位的阈值电压 如果最坏情况下的组件是可操作的，则保证所有组件都是可操作的，并且因此可以使电子电路脱离复位。 此外，因为阈值电压基于电子电路的最坏情况分量，所以跳闸点发生器的阈值电压将充分地跟踪正常过程和温度变化的电子电路。 另外，通电复位电路包括噪声滤波器（34），用于如果电源电压内的变化导致电源电压电平下降到预定阈值以下达至少最小时间段 。

公开(公告)号：EP1086466A1

公开(公告)日：2001-03-28

申请号：EP00917817.9

申请日：2000-03-09

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： WOJEWODA, Igor ,  TRIECE, Joseph, W.

IPC: G11C16/22 ,  G11C29/00 ,  G06F1/22

CPC classification number: G11C16/225 ,  G06F9/24 ,  G06F9/30101 ,  G11C16/22

Abstract: A microcontroller having a memory programmable in user mode. The microcontroller contains circuitry for detecting whether a programming level voltage has been activated. Also included is a Longwrite enable register containing an enable bit for enabling/disabling programming of the memory. When the register contains the bit indicating programming as enabled, and the programming level voltage is detected, the microcontroller allows the program memory to be programmed. The programming can take place in user mode. The programming level voltage signal is also used to detect whether to enter into a test mode. Programming of the program memory is also possible in the test mode. The invention is also directed to a method for operating a microcontroller for controlling programming of the program memory. The microcontroller according to the invention allows increased functionality by detecting whether to enter the test mode without the requirement of a test mode select input signal.