公开(公告)号：US10600640B2

公开(公告)日：2020-03-24

申请号：US15624603

申请日：2017-06-15

Applicant: Stratio, Inc.

Inventor： Woo-Shik Jung ,  Yeul Na ,  Youngsik Kim ,  Jae Hyung Lee ,  Jin Hyung Lee

IPC: H01L21/02 ,  H01L21/302 ,  H01L21/324 ,  H01L21/265 ,  H01L21/311 ,  H01L21/306

Abstract: Methods for reducing surface roughness of germanium are described herein. In some embodiments, the surface roughness is reduced by thermal oxidation of germanium. In some embodiments, the surface roughness is further reduced by controlling a rate of the thermal oxidation. In some embodiments, the surface roughness is reduced by thermal annealing.

公开(公告)号：US20170287706A1

公开(公告)日：2017-10-05

申请号：US15624603

申请日：2017-06-15

Applicant: Stratio, Inc.

Inventor： Woo-Shik Jung ,  Yeul Na ,  Youngsik Kim ,  Jae Hyung Lee ,  Jin Hyung Lee

IPC: H01L21/02 ,  H01L21/265 ,  H01L21/311

Abstract: Methods for reducing surface roughness of germanium are described herein. In some embodiments, the surface roughness is reduced by thermal oxidation of germanium. In some embodiments, the surface roughness is further reduced by controlling a rate of the thermal oxidation. In some embodiments, the surface roughness is reduced by thermal annealing.

公开(公告)号：WO2020096620A1

公开(公告)日：2020-05-14

申请号：PCT/US2018/060134

申请日：2018-11-09

Applicant: STRATIO ,  LEE, Jae, Hyung

Inventor： LEE, Jae, Hyung ,  NA, Yeul ,  KIM, Youngsik

IPC: H01L21/20 ,  H01L21/203 ,  H01L21/205 ,  H01L21/223 ,  H01L21/34 ,  H01L21/36

Abstract: A method for obtaining a semiconductor island includes epitaxially growing a semiconductor structure over a substrate with a mask layer defining a region not covered by the mask layer. The semiconductor structure includes a first portion located adjacent to the mask layer and a second portion located away from the mask layer. The first portion has a first height that is less than a second height of a portion of the mask layer located adjacent to the first portion. The second portion has a third height that is equal to, or greater than, the second height. The method also includes forming a filling layer over at least the first portion; and, subsequently removing at least a portion of the semiconductor structure that is located above the second height. Devices made by this method are also disclosed.

公开(公告)号：WO2019084569A1

公开(公告)日：2019-05-02

申请号：PCT/US2018/058059

申请日：2018-10-29

Applicant: STRATIO ,  LEE, Jae, Hyung

Inventor： LEE, Jae, Hyung ,  KIM, Youngsik ,  NA, Yeul ,  KANG, Juhyung

IPC: G01B9/00 ,  G01J1/00 ,  G01J1/10 ,  G01J1/16 ,  G01J1/42

CPC classification number: G01B9/00 ,  G01J1/00 ,  G01J1/10 ,  G01J1/16 ,  G01J1/42

Abstract: An apparatus for analyzing light includes an input aperture for receiving light; a first set of one or more lenses configured to relay light from the input aperture; and a prism assembly configured to disperse light from the first set of one or more lenses. The prism assembly includes a plurality of prisms that includes a first prism, a second prism that is distinct from the first prism, and a third prism that is distinct from the first prism and the second prism. The first prism is mechanically coupled with the second prism and the second prism is mechanically coupled with the third prism. The apparatus also includes a second set of one or more lenses configured to focus the dispersed light from the prism assembly; and an array detector configured for converting the light from the second set of one or more lenses to electrical signals.

公开(公告)号：WO2014205353A2

公开(公告)日：2014-12-24

申请号：PCT/US2014/043421

申请日：2014-06-20

Applicant: STRATIO, INC.

Inventor： LEE, Jae, Hyung ,  NA, Yeul ,  KIM, Youngsik ,  JUNG, Woo-Shik

IPC: H01L31/08

CPC classification number: H01L27/14649 ,  H01L27/14614 ,  H01L27/14616 ,  H01L27/14689 ,  H04N5/361

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

Abstract translation: 用于感测光的装置包括掺杂有第一类型的掺杂剂的第一半导体区域和掺杂有第二类型的掺杂剂的第二半导体区域。 第二半导体区域位于第一半导体区域的上方。 该器件包括栅绝缘层; 一个门，一个源头和一个排水沟。 第二半导体区域具有朝向栅极绝缘层定位的顶表面和与第二半导体区域的顶表面相对定位的底表面。 第二半导体区域具有包括第二半导体区域的顶表面的上部和包括第二半导体区域的底表面并与上部相互排斥的下部。 第一半导体区域与第二半导体区域的上部和下部部分接触。

公开(公告)号：WO2023033199A1

公开(公告)日：2023-03-09

申请号：PCT/KR2021/011669

申请日：2021-08-31

Applicant: STRATIO

Inventor： LEE, Jae Hyung ,  KIM, Youngsik ,  NA, Yeul

IPC: G06T7/00 ,  G06N20/20

Abstract: A method of assessing a similarity between a product image and reference drawings may include obtaining one or more feature vectors corresponding to one or more images of a product; retrieving a plurality of trained models built to determine respective similarities to respective reference products; for a respective trained model, of the plurality of trained models, built to determine a respective similarity between the product and the respective reference product, applying the respective trained model to a feature vector of the one or more feature vectors corresponding to the one or more images of the product for determining a similarity between an image of the one or more images of the product and an image of the respective reference product; and providing the respective similarity between the product and the respective reference product. A method of such building models is also described.

公开(公告)号：WO2016100373A1

公开(公告)日：2016-06-23

申请号：PCT/US2015/065869

申请日：2015-12-15

Applicant: STRATIO, INC.

Inventor： JUNG, Woo-shik ,  NA, Yeul ,  KIM, Youngsik ,  LEE, Jae, Hyung ,  LEE, Jin, Hyung

IPC: H01L21/02

CPC classification number: H01L21/02236 ,  H01L21/02255 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/26513 ,  H01L21/302 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/3247

Abstract: Methods for reducing surface roughness of germanium are described herein. In some embodiments, the surface roughness is reduced by thermal oxidation of germanium. In some embodiments, the surface roughness is further reduced by controlling a rate of the thermal oxidation. In some embodiments, the surface roughness is reduced by thermal annealing.

Abstract translation: 本文描述了降低锗表面粗糙度的方法。 在一些实施例中，通过锗的热氧化来减少表面粗糙度。 在一些实施方案中，通过控制热氧化的速率进一步降低表面粗糙度。 在一些实施例中，通过热退火来降低表面粗糙度。

公开(公告)号：WO2014205353A3

公开(公告)日：2015-02-19

申请号：PCT/US2014043421

申请日：2014-06-20

Applicant: STRATIO INC

Inventor： LEE JAE HYUNG ,  NA YEUL ,  KIM YOUNGSIK ,  JUNG WOO-SHIK

IPC: H01L27/14 ,  H01L27/142 ,  H01L27/146

CPC classification number: H01L27/14649 ,  H01L27/14614 ,  H01L27/14616 ,  H01L27/14689 ,  H04N5/361

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

Abstract translation: 用于感测光的装置包括掺杂有第一类型的掺杂剂的第一半导体区域和掺杂有第二类型的掺杂剂的第二半导体区域。 第二半导体区域位于第一半导体区域的上方。 该器件包括栅极绝缘层; 一个门，一个源头和一个排水沟。 第二半导体区域具有朝向栅极绝缘层定位的顶表面和与第二半导体区域的顶表面相对定位的底表面。 第二半导体区域具有包括第二半导体区域的顶表面的上部和包括第二半导体区域的底表面并且与上部相互排斥的下部。 第一半导体区域与第二半导体区域的上部和下部两者接触。

公开(公告)号：JP2021501314A

公开(公告)日：2021-01-14

申请号：JP2020522922

申请日：2018-10-29

Applicant: ストレイティオ ,  STRATIO

Inventor： ジェヒュン リー ,  ヨンシク キム ,  ヨル ナ ,  ジュヒュン カン

IPC: H01L31/0232 ,  H01L31/10 ,  G01J3/14 ,  G02B5/00 ,  G02B5/04 ,  H01L27/146 ,  G01J3/36

Abstract: 光を分析するための装置は、光を受けるための入力アパーチャと、入力アパーチャからの光を中継するように構成された1つまたは複数のレンズの第1のセットと、1つまたは複数のレンズの第1のセットからの光を分散させるように構成されたプリズム・アセンブリとを含む。プリズム・アセンブリは、第1のプリズムと、第1のプリズムとは異なる第2のプリズムと、第1のプリズムおよび第2のプリズムとは異なる第3のプリズムとを含め複数のプリズムを含む。第1のプリズムは、第2のプリズムと機械的に結合され、第2のプリズムは、第3のプリズムと機械的に結合される。装置は、プリズム・アセンブリからの分散された光を集光するように構成された1つまたは複数のレンズの第2のセットと、1つまたは複数のレンズの第2のセットからの光を電気信号に変換するために構成されたアレイ検出器とをやはり含む。

公开(公告)号：JP2018515904A

公开(公告)日：2018-06-14

申请号：JP2016557040

申请日：2016-05-23

Applicant: ストレイティオ, インコーポレイテッド ,  STRATIO, INC.

Inventor： ジェヒュン リー ,  ヨル ナ ,  ヨンシク キム ,  ウーシク ジュン

IPC: H01L21/306 ,  H01L21/205

CPC classification number: H01L21/3081 ,  H01L21/02057 ,  H01L21/02082 ,  H01L21/02636 ,  H01L21/30604

Abstract: 選択エピタキシャル成長プロセス中に形成された核を除去するための方法は、一つ又は複数のマスク層が付いた基板の上で第1グループの一つ又は複数の半導体構造をエピタキシャル成長させることを含む。一つ又は複数のマスク層の上に第2グループの複数の半導体構造が形成される。本方法は、第1グループの一つ又は複数の半導体構造の上で一つ又は複数の保護層を形成することも含む。第2グループの複数の半導体構造の少なくとも一部分が、一つ又は複数の保護層から露出されている。本方法は、第1グループの一つ又は複数の半導体構造の上で一つ又は複数の保護層を形成した後に、第2グループの複数の半導体構造の少なくとも一部分をエッチングすることを更に含む。