公开(公告)号：WO2016191371A1

公开(公告)日：2016-12-01

申请号：PCT/US2016/033783

申请日：2016-05-23

Applicant: STRATIO, INC. ,  STRATIO

Inventor： LEE, Jae Hyung ,  NA, Yeul ,  KIM, Youngsik ,  JUNG, Woo-shik

IPC: H01L21/02 ,  H01L21/308

CPC classification number: H01L21/3081 ,  H01L21/02057 ,  H01L21/02082 ,  H01L21/02636 ,  H01L21/30604

Abstract: A method for removing nuclei formed during a selective epitaxial growth process includes epitaxially growing a first group of one or more semiconductor structures over a substrate with one or more mask layers. A second group of a plurality of semiconductor structures is formed on the one or more mask layers. The method also includes forming one or more protective layers over the first group of one or more semiconductor structures. At least a subset of the second group of the plurality of semiconductor structures is exposed from the one or more protective layers. The method further includes, subsequent to forming the one or more protective layers over the first group of one or more semiconductor structures, etching at least the subset of the second group of the plurality of semiconductor structures.

Abstract translation: 一种用于去除在选择性外延生长工艺过程中形成的核的方法包括用一个或多个掩模层在衬底上外延生长第一组一个或多个半导体结构。 在一个或多个掩模层上形成第二组多个半导体结构。 该方法还包括在一个或多个半导体结构的第一组上形成一个或多个保护层。 多个半导体结构的第二组的至少一个子集从一个或多个保护层露出。 该方法还包括：在一个或多个半导体结构的第一组上形成一个或多个保护层之后，至少蚀刻多个半导体结构的第二组的子集。

公开(公告)号：WO2017139008A1

公开(公告)日：2017-08-17

申请号：PCT/US2016/064585

申请日：2016-12-02

Applicant: STRATIO ,  STRATIO, INC.

Inventor： LEE, Jae Hyung ,  KANG, Juhyung ,  KIM, Youngsik ,  NA, Yeul ,  JUNG, Wooshik

IPC: A61B1/06 ,  A61B5/00 ,  A61B5/145 ,  A61B5/1455 ,  G01B9/02 ,  G01J1/16 ,  G01J1/42

CPC classification number: G01J1/42 ,  G01J1/16 ,  G01J1/44 ,  G01J3/0208 ,  G01J3/021 ,  G01J3/14 ,  G01J3/1838 ,  G01J3/2803 ,  G01J3/2823 ,  G01J5/024 ,  G01J5/10 ,  G01J2003/1861 ,  G01J2003/2826 ,  H01L27/1461 ,  H01L27/14616 ,  H01L27/14645 ,  H01L27/14649 ,  H01L27/14689

Abstract: An apparatus for analyzing visible and shortwave infrared light includes an input aperture for receiving light that includes a visible wavelength component and a shortwave infrared wavelength component; a first set of one or more lenses configured to relay light from the input aperture; one or more dispersive optical elements configured to disperse light from the first set of one or more lenses; a second set of one or more lenses configured to focus the dispersed light from the one or more dispersive optical elements; and an array detector configured for converting the light from the second set of one or more lenses to electrical signals that include electrical signals indicating intensity of the visible wavelength component and electrical signals indicating intensity of the shortwave infrared wavelength component.

Abstract translation: 一种用于分析可见光和短波红外光的装置包括：输入孔，用于接收包括可见光波长成分和短波红外波长成分的光; 第一组一个或多个透镜，其被配置为中继来自所述输入孔径的光; 一个或多个色散光学元件，其被配置为分散来自所述第一组一个或多个透镜的光; 第二组一个或多个透镜，其被配置为聚焦来自所述一个或多个色散光学元件的色散光; 以及阵列检测器，被配置用于将来自第二组一个或多个透镜的光转换为包括指示可见波长成分的强度的电信号和指示短波红外波长成分的强度的电信号的电信号。

公开(公告)号：WO2016100373A1

公开(公告)日：2016-06-23

申请号：PCT/US2015/065869

申请日：2015-12-15

Applicant: STRATIO, INC.

Inventor： JUNG, Woo-shik ,  NA, Yeul ,  KIM, Youngsik ,  LEE, Jae, Hyung ,  LEE, Jin, Hyung

IPC: H01L21/02

CPC classification number: H01L21/02236 ,  H01L21/02255 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02664 ,  H01L21/26513 ,  H01L21/302 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/3247

Abstract: Methods for reducing surface roughness of germanium are described herein. In some embodiments, the surface roughness is reduced by thermal oxidation of germanium. In some embodiments, the surface roughness is further reduced by controlling a rate of the thermal oxidation. In some embodiments, the surface roughness is reduced by thermal annealing.

Abstract translation: 本文描述了降低锗表面粗糙度的方法。 在一些实施例中，通过锗的热氧化来减少表面粗糙度。 在一些实施方案中，通过控制热氧化的速率进一步降低表面粗糙度。 在一些实施例中，通过热退火来降低表面粗糙度。

公开(公告)号：EP3528288A1

公开(公告)日：2019-08-21

申请号：EP18214935.1

申请日：2014-06-20

Applicant: Stratio, Inc.

Inventor： LEE, Jae, Hyung ,  NA, Yeul ,  KIM, Youngsik ,  JUNG, Woo-Shik

IPC: H01L27/146

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

公开(公告)号：WO2014205353A2

公开(公告)日：2014-12-24

申请号：PCT/US2014/043421

申请日：2014-06-20

Applicant: STRATIO, INC.

Inventor： LEE, Jae, Hyung ,  NA, Yeul ,  KIM, Youngsik ,  JUNG, Woo-Shik

IPC: H01L31/08

CPC classification number: H01L27/14649 ,  H01L27/14614 ,  H01L27/14616 ,  H01L27/14689 ,  H04N5/361

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

Abstract translation: 用于感测光的装置包括掺杂有第一类型的掺杂剂的第一半导体区域和掺杂有第二类型的掺杂剂的第二半导体区域。 第二半导体区域位于第一半导体区域的上方。 该器件包括栅绝缘层; 一个门，一个源头和一个排水沟。 第二半导体区域具有朝向栅极绝缘层定位的顶表面和与第二半导体区域的顶表面相对定位的底表面。 第二半导体区域具有包括第二半导体区域的顶表面的上部和包括第二半导体区域的底表面并与上部相互排斥的下部。 第一半导体区域与第二半导体区域的上部和下部部分接触。

公开(公告)号：WO2021108364A1

公开(公告)日：2021-06-03

申请号：PCT/US2020/061945

申请日：2020-11-24

Applicant: STRATIO ,  STRATIO, INC. ,  KOREA MINTING AND SECURITY PRINTING CORPORATION

Inventor： LEE, Jae, Hyung ,  OH, Su Ryeo ,  NA, Yeul ,  PARK, Se Jin ,  KIM, Youngsik ,  CHOE, Wongyun ,  CHOI, II-hoon ,  SEO, Bomjoon ,  JOO, Sunghyun ,  SHIN, Hwasup ,  CHO, Minsoo

IPC: G06K7/14

Abstract: A method performed at an electronic device with one or more processors and memory storing one or more programs includes receiving a plurality of images of a machine readable code. A respective image of the plurality of images corresponds to a distinct wavelength. The method also includes analyzing the respective image of the plurality of images to obtain a respective processed information; combining the respective processed information to obtain combined information; and providing the combined information to at least one program of the one or more programs stored in the memory for processing.

公开(公告)号：WO2016049558A1

公开(公告)日：2016-03-31

申请号：PCT/US2015/052410

申请日：2015-09-25

Applicant: STRATIO ,  STRATIO, INC.

Inventor： LEE, Jae, Hyung ,  KIM, Youngsik ,  NA, Yeul ,  JUNG, Wooshik ,  BHATTIPROLU, Seema

IPC: H04L9/32

CPC classification number: H04L63/0876 ,  G06F21/44 ,  H04L63/104 ,  H04W12/06 ,  H04W12/08

Abstract: A server system receives from a first electronic device a first device identifier and network information of the first electronic device; subsequent to receiving the first device identifier and the network information of the first electronic device, receives from a second electronic device a second device identifier and network information of the second electronic device; in response to receiving from the second electronic device the second device identifier and the network information of the second electronic device, determines whether the first device identifier is associated with the second device identifier; and, in accordance with a determination that the first device identifier is associated with the second device identifier, sends to the second electronic device the network information of the first electronic device and/or sends to the first electronic device the network information of the second electronic device.

Abstract translation: 服务器系统从第一电子设备接收第一设备标识符和第一电子设备的网络信息; 在接收到第一设备标识符和第一电子设备的网络信息之后，从第二电子设备接收第二设备标识符和第二电子设备的网络信息; 响应于从所述第二电子设备接收到所述第二设备标识符和所述第二电子设备的网络信息，确定所述第一设备标识符是否与所述第二设备标识符相关联; 并且根据第一设备标识符与第二设备标识符相关联的确定，向第二电子设备发送第一电子设备的网络信息和/或向第一电子设备发送第二电子设备的网络信息 设备。

公开(公告)号：EP3528288B1

公开(公告)日：2020-08-26

申请号：EP18214935.1

申请日：2014-06-20

Applicant: Stratio, Inc.

Inventor： LEE, Jae, Hyung ,  NA, Yeul ,  KIM, Youngsik ,  JUNG, Woo-Shik

IPC: H01L27/146

公开(公告)号：EP3608944A1

公开(公告)日：2020-02-12

申请号：EP19188206.7

申请日：2016-05-23

Applicant: Stratio, Inc.

Inventor： LEE, Jae Hyung ,  NA, Yeul ,  KIM, Youngsik ,  JUNG, Woo-shik

IPC: H01L21/20 ,  H01L21/308

Abstract: A method for removing nuclei formed during a selective epitaxial growth process includes epitaxially growing a first group of one or more semiconductor structures over a substrate with one or more mask layers. A second group of a plurality of semiconductor structures is formed on the one or more mask layers. The method also includes forming one or more protective layers over the first group of one or more semiconductor structures. At least a subset of the second group of the plurality of semiconductor structures is exposed from the one or more protective layers. The method further includes, subsequent to forming the one or more protective layers over the first group of one or more semiconductor structures, etching at least the subset of the second group of the plurality of semiconductor structures.

公开(公告)号：EP3011594B1

公开(公告)日：2018-12-26

申请号：EP14814462.9

申请日：2014-06-20

Applicant: Stratio, Inc.

Inventor： LEE, Jae, Hyung ,  NA, Yeul ,  KIM, Youngsik ,  JUNG, Woo-Shik

IPC: H01L27/146

CPC classification number: H01L31/1136 ,  H01L27/14614 ,  H01L27/14616 ,  H01L27/14649 ,  H01L27/14689 ,  H01L31/1804 ,  H04N5/361 ,  H04N5/378

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.