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21.发明专利
公开(公告)号：JPH117798A
公开(公告)日：1999-01-12
申请号：JP14328598
申请日：1998-05-25
Applicant: ST MICROELECTRON INC
Inventor： SIUCHEONG SO JASON
IPC: G01R31/28 , G11C29/02 , G11C29/06 , G11C29/12 , G11C29/28 , G11C29/34 , G11C29/50 , G11C29/56 , G11C29/00
Abstract: PROBLEM TO BE SOLVED: To shorten the time required for testing a memory by forming a stress select means on a substrate and performing a stress test only at a selected part on a memory block in order to decide whether the memory block is accepted or not. SOLUTION: An integrated circuit 10 having enhanced test capacity comprises a substrate 11, and a memory block 20 including a plurality of memory cells 25 arranged in a matrix having a plurality of rows R and columns C. A selectable stress tester 30 including a selectable test pattern generating means is formed on the substrate 11. The test pattern generating means generates a test pattern selectively over the boundary only between two adjacent rows R and two adjacent columns C of the memory block 20. A decision is made whether a selected part of the memory block 20 is acceptable or not by applying a high frequency waveform signal of about 100 MHz.
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公开(公告)号：JPH113593A
公开(公告)日：1999-01-06
申请号：JP11672398
申请日：1998-04-27
Applicant: ST MICROELECTRON INC
Inventor： MCCLURE DAVID CHARLES
IPC: G01R31/28 , G11C11/4076 , G11C11/419 , G11C29/02 , G11C29/12 , G11C29/46 , G11C29/50 , G11C29/00
Abstract: PROBLEM TO BE SOLVED: To enable the clock operation of a sense amplifier to be externally controlled by interrupting the usual clock operation of the sense amplifier during the period of test mode and conduct the clock operation of the sense amplifier in compliance with the transition of external control signals. SOLUTION: A block control circuit 20 generates a sense amplifier enable(SAEN) signal 14 which is used for the clock operation of the sense amplifier of a memory device. A detection signal 26 is the logical product of a test mode enable signal 24 and an external control signal. It follows the external control signal when the test mode enable signal 24 is at the high logic state and shows having entered to the test mode. This condition in the test mode enables that the SAEN signal 14 becomes the high logic state which allows the clock operation of the sense amplifier. Thereby, the lock operation of the sense amplifier is made it possible to follow an external control signal.
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公开(公告)号：JPH10308927A
公开(公告)日：1998-11-17
申请号：JP33850497
申请日：1997-12-09
Applicant: ST MICROELECTRON INC
Inventor： MCDADE DARRYN D , OWEN JEFFERSON E
IPC: G06F1/12 , G06F1/08 , G06T1/00 , G11B20/00 , G11B27/10 , G11B27/30 , H04N5/04 , H04N5/765 , H04N5/92 , H04N7/26 , H04N7/24
Abstract: PROBLEM TO BE SOLVED: To easily render audio visual stream from DVDCD-ROM with a personal computer, to simplify the synchronization of an audio visual stream and to reduce cost, by giving a software clock operating at a specified software- generated frequency. SOLUTION: At the time of determining a proper time for rendering the audio visual stream, a software clock 124 executed on a thread different from a DVD player 122 is used. The clock asynchronously operates with the DVD player 122 and, it is scheduled against CPU 104 apart from the DVD player 122. The software clock 124 is a counter operating at 27 MHz based on the time counter 126 of CPU 104. Audio decoders 112 and 114 are made by hardware circuits based on conventional technology.
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公开(公告)号：JPH10248067A
公开(公告)日：1998-09-14
申请号：JP33323597
申请日：1997-12-03
Applicant: ST MICROELECTRON INC
Inventor： DIAZ RAUL ZEGERS , BALAKRISHNAN JEYENDRAN , OWEN JEFFERSON EUGENE
IPC: H04N19/103 , H03M7/30 , H04N7/26 , H04N7/32 , H04N7/50
Abstract: PROBLEM TO BE SOLVED: To provide the multi-standard uncompressor/compressor that is able to make uncompression and/or compression according to any of a plurality of protocols and its method. SOLUTION: A decoder 200 has a decoder module provided with a parser 36, a block decoder 50, and a motion compensation engine 86, and they are divided into functional blocks. Each functional block may be bypassed in the case that the block is not required or a compression algorithm does not need the functional block and a frame is uncompressed so as to increase a speed of the decoder. Each functional block is used again for uncompression or compression based on a different standard or with respect to different operation of the decoder such as uncompression and compensation.
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公开(公告)号：JP2014110430A
公开(公告)日：2014-06-12
申请号：JP2013247490
申请日：2013-11-29
Inventor： NICOLAS LOUBET , PRASANNA KHARE
IPC: H01L29/78 , H01L21/28 , H01L21/336 , H01L29/41 , H01L29/417
CPC classification number: H01L27/088 , H01L29/66477 , H01L29/66795 , H01L29/785
Abstract: PROBLEM TO BE SOLVED: To prevent leakage of charge between a semiconducting channel and a substrate in a strained silicon FinFET device.SOLUTION: By inserting an insulating layer between the channel (fin) and the substrate, the fin is isolated from the substrate both physically and electrically. To form the isolated FinFET device, an array of bi-layer fins is grown epitaxially from the silicon substrate, between nitride columns that provide localized insulation between adjacent fins. Then, the lower fin layer can be removed while leaving the upper fin layer, thus yielding an interdigitated array of nitride columns and semiconducting fins suspended above the silicon surface. A resulting gap underneath the upper fin layer can then be filled in with oxide to isolate the array of fin channels from the substrate.
Abstract translation: 要解决的问题：为了防止应变硅FinFET器件中的半导体沟道和衬底之间的电荷泄漏。解决方案：通过在沟道（鳍片）和衬底之间插入绝缘层，翅片与物理物质隔离 并电。 为了形成隔离的FinFET器件，从硅衬底外延生长双层鳍片的阵列，在相邻鳍片之间提供局部绝缘的氮化物柱之间。 然后，可以在离开上部翅片层的同时去除下部翅片层，从而产生悬挂在硅表面上方的氮化物柱和半导体翅片的交错排列。 然后可以用氧化物填充在上鳍片下方的所得间隙，以将翅片通道阵列与基底隔离。
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Patent Agency Ranking
公开(公告)号：JPH11204002A
公开(公告)日：1999-07-30
申请号：JP29989098
申请日：1998-10-21
Applicant: ST MICROELECTRON INC
Inventor： GUPTA BHUSAN , KRAMER ALAN HENRY
Abstract: PROBLEM TO BE SOLVED: To provide a switch operable by finger tips at low cost by relating the size of a signal of an output node of an amplifier to the proximity of a non-grounded object to the exposed surface, and providing a signal comparator for comparing the signal of the output node and with a reference voltage. SOLUTION: When finger tips are positioned on an outer surface 125 of a solid state switch 400, and first and second capacitors 34 and 33 are operated together with plates 23 and 24, each cycle of a circulation circuit 800 closes a switch 19 temporarily, and makes an amplifier 13 operable after an amplifier output terminal 17 is short-circuited to an amplifier input terminal 16. A signal comparator circuit 410 is provided at the switch 400, and is operated so that a signal output 17 of the amplifier 13 is compared with a grounded reference supply source a DC reference voltage 411; when the switch 400 is closed, an output lead 430 is short-circuited to the ground 432; and only when finger tips stay on the surface 125, the switch 400 is maintained in a closed state.
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公开(公告)号：JPH11127591A
公开(公告)日：1999-05-11
申请号：JP18602898
申请日：1998-07-01
Applicant: ST MICROELECTRON INC
Inventor： MENEGOLI PAOLO , COLLI GIANLUCA
Abstract: PROBLEM TO BE SOLVED: To prevent parasitic effects when the power to a DC motor is turned down during a power-off period of the motor by clamping related power nodes to a reference voltage. SOLUTION: A BEMF control circuit 10 is provided with three input follower means 12, 13, 14, and the three means 12, 13, 14 are basically identical. The circuit 10 monitors the voltage on wires 70, 70', 70" corresponding to low-side driver output nodes A, B, C and continuously compares them with one another. If any one falls below the others, a current is produced via the current path corresponding to the circuit. A mirror circuit corresponding to the current path is provided with a transistor 30, 30' or 30", and a current passing through one of them causes a current passed via a corresponding mirror transistor 46, 46' or 46" to be varied, and controls the current passed through the collector of the respective transistor on the wire 72, 72', or 72". As a result, parasitic effect can be prevented, when power breakdown occurs.
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公开(公告)号：JPH11127590A
公开(公告)日：1999-05-11
申请号：JP18291298
申请日：1998-06-29
Applicant: ST MICROELECTRON INC
Inventor： ALBINO PIDUTTI
Abstract: PROBLEM TO BE SOLVED: To appropriately match the input capacitance of a boost capacitor with that of a switching transistor. SOLUTION: A circuit is provided with first and second pairs of high-side and low-side switching devices, 14, 18 and 12, 16 respectively to selectively connect an electric load 20 between first 26 and second 28 voltage supply lines, and boost capacitors 40 and 44 which as connected to each switching terminal of the low-side switching devices 12 and 16. Each of the boost capacitors has a capacitance that is substantially equivalent to one input capacitance that low-side switching devices are related to. Each of the boost capacitors, preferably, is given by a MOS transistor with physical layout and dimensions that are substantially the same as those of one of the low-side switching devices.
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公开(公告)号：JPH11103239A
公开(公告)日：1999-04-13
申请号：JP15042898
申请日：1998-05-29
Applicant: ST MICROELECTRON INC
Inventor： DANSTROM ERIC J , BUCHANAN JOHN
Abstract: PROBLEM TO BE SOLVED: To provide a precise oscillator capable of reducing the complexity of its circuit without requiring a precise crystal and to provide operation method therefor. SOLUTION: The precise oscillator 30' is provided with a capacitor, a charging current source 90, a discharging current source 91, a switch 93 for alternately connecting the capacitor to respective current sources 90, 91, and a hysteresis comparator 95 connected to the capacitor and capacitor of generating oscillation in response to the charge and discharge of the capacitor. Preferably a duty cycle controller 100 is connected at least to one of the current sources 90, 91 and steps up the duty cycle of an oscillation signal by setting up a charging current and/or a discharging current and the ratio of the charging current to the discharging current.
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30.发明专利
公开(公告)号：JPH1174372A
公开(公告)日：1999-03-16
申请号：JP18467098
申请日：1998-06-30
Applicant: ST MICROELECTRON INC
Inventor： SAGARWALA PERVEZ H , ZAMANIAN MEHDI , RAVI SANDARESAN
IPC: H01L21/8238 , H01L27/092
Abstract: PROBLEM TO BE SOLVED: To provide a CMOS integrated-circuit device which can be provided with an N-channel transistor and with a P-channel transistor, by a method wherein N type dopant impurities are implanted into a P-type silicon region, and the low-specific-resistance region of the N-channel transistor is formed. SOLUTION: An N type dopant is implanted, and the source-drain region of an N-channel transistor is formed. A photoresist mask 68 is placed on an N-type silicon active region 12. An N type dopant is implanted into a region which is not marked in a P-type silicon region 14, and a source-drain region 54 of the N-channel transistor is formed. A source-drain region 44' of a P- channel MOSFET 60 using only a first oxide layer is formed in a self-aligned manner, and a low-specific-resistance part 56 of the source-drain region 54 of an N-channel MOSFET 62 using a sidewall spacer 38 as a hole is formed in a self-adjusting manner. As a result, the complementary transistors 60, 62 whose characteristic is optimized are formed.
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