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公开(公告)号：KR1019940002274B1
公开(公告)日：1994-03-19
申请号：KR1019900021838
申请日：1990-12-26
Applicant: 한국전자통신연구원
IPC: G06F11/16
Abstract: The circuit comprises input/output units for processing commands and data, a instantaneous data expansion processing circuit which expands into zero the upper 16 bits of the command register from the register file, allows the lower 16 bit to have the output data of the lower 16 bits of the command register and generates data signals by selecting the B port data of the register file, and a operation circuit which performs logic multiplication of the two data signals from the aforementioned circuit.
Abstract translation: 该电路包括用于处理命令和数据的输入/输出单元，瞬时数据扩展处理电路，从寄存器堆扩展到命令寄存器的高16位，为零，允许低16位具有下16位的输出数据 命令寄存器的位，并且通过选择寄存器堆的B端口数据来生成数据信号，以及执行来自前述电路的两个数据信号的逻辑乘法运算电路。
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公开(公告)号：KR1019930002789B1
公开(公告)日：1993-04-10
申请号：KR1019900021837
申请日：1990-12-26
Applicant: 한국전자통신연구원
IPC: G06F13/40
Abstract: The circuit expands variable length of data in a 32 bit microprocessor to simplify the variation of word length. It includes a two input multiplexer (1) for selecting half-word data (31...0 or 32...16) according to the address signal (A1) for bite-positioning, a four input multiplexer (2), a multiplexer (3) for selecting code, and an expansion multiplexer (5) for selecting one of the data, which is zero expanded, code expanded or original code.
Abstract translation: 该电路在32位微处理器中扩展了可变长度的数据，以简化字长的变化。 它包括用于根据用于咬定位的地址信号（A1）来选择半字数据（31 ... 0或32 ... 16）的双输入多路复用器（1），四输入多路复用器（2）， 用于选择代码的多路复用器（3）和用于选择零扩展，代码扩展或原始代码的数据之一的扩展多路复用器（5）。
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