公开(公告)号：KR100874772B1

公开(公告)日：2008-12-19

申请号：KR1020070107435

申请日：2007-10-24

Applicant: 한국정보통신대학교 산학협력단 ,  한국전자통신연구원

Inventor： 이인영 ,  윤석주 ,  이상국 ,  최성훈 ,  김창선

IPC: H03B5/12

CPC classification number: H03B5/1212 ,  H03B5/1228

Abstract: A switch, a negative resistance unit, and a differential voltage controlled oscillator using the same are provided to minimize an implementation area. A differential voltage-controlled oscillator(1000) includes a resonator(200), first and second output terminals, and a negative resistance unit(100). The resonator generates the oscillation frequency corresponding to the inputted voltage. The first and second output terminals are connected to one end and other end of the resonator and output the oscillation frequency. The negative resistance unit is operated by corresponding to the oscillation frequency. The negative resistance unit includes the switch. The switch includes a first signal line, a second signal line, a source electrode, a first gate electrode, a second gate electrode, a first drain electrode, and a second drain electrode.

Abstract translation: 提供开关，负电阻单元和使用其的差分压控振荡器以最小化实现区域。 差分压控振荡器（1000）包括谐振器（200），第一和第二输出端子以及负电阻单元（100）。 谐振器产生对应于输入电压的振荡频率。 第一和第二输出端子连接到谐振器的一端和另一端并输出振荡频率。 负电阻单元与振荡频率相对应。 负电阻单元包括开关。 开关包括第一信号线，第二信号线，源电极，第一栅电极，第二栅电极，第一漏电极和第二漏电极。

公开(公告)号：KR1020080056079A

公开(公告)日：2008-06-20

申请号：KR1020070071751

申请日：2007-07-18

Applicant: 한국전자통신연구원 ,  한양대학교 산학협력단

Inventor： 김창선 ,  박장현 ,  백상현 ,  배종선

IPC: G11C29/00

CPC classification number: G11C29/14 ,  G11C29/1201 ,  G11C29/50 ,  G11C2029/5006

Abstract: A semiconductor memory device for testing capacitive crosstalk defects between unit cells and a test method therein are provided to perform the test by detecting an AC current between the unit cells directly, by applying stress to a bit line in the semiconductor memory device. A plurality of unit cells(C0,C1) store data. A bit line test driving part(200) detects crosstalk between the plurality of unit cells by inputting a different test signal to a pair of bit lines connected to the plurality of unit cells in a test mode. The unit cell includes a latch for storing data, a first switch and a second switch. The first switch transmits the data stored in the latch to one of the pair of bit lines. The second switch transmits inverted value of the data to the other of the pair of bit lines.

Abstract translation: 提供了一种用于测试单元电池之间的电容串扰缺陷的半导体存储器件及其测试方法，用于通过对半导体存储器件中的位线施加应力来直接检测单元电池之间的AC电流来执行测试。 多个单位单元（C0，C1）存储数据。 位线测试驱动部分（200）通过在测试模式中向连接到多个单位单元的一对位线输入不同的测试信号来检测多个单元单元之间的串扰。 单位单元包括用于存储数据的锁存器，第一开关和第二开关。 第一开关将存储在锁存器中的数据发送到该对位线之一。 第二开关将数据的反相值发送到该对位线中的另一个。

公开(公告)号：KR1020120089410A

公开(公告)日：2012-08-10

申请号：KR1020110035019

申请日：2011-04-15

Applicant: 한국전자통신연구원 ,  한국과학기술원

Inventor： 박장현 ,  최성훈 ,  김창선 ,  이우재 ,  조민창 ,  조성환

IPC: H03F3/45

CPC classification number: H03F3/45475 ,  H03F2200/261 ,  H03F2203/45138

Abstract: PURPOSE: An apparatus of increasing a common mode rejection ratio and a method thereof are provided to improve a common mode rejection ratio by using three instrumentation amplifiers. CONSTITUTION: A measurement amplification device comprises a first instrument amplifier(110), a second instrument amplifier(120), and a third instrument amplifier(130). The first instrument amplifier has a positive input terminal(112) and a negative input terminal(114). A signal is inputted to the first instrument amplifier through the positive input terminal and the negative input terminal. The first instrument amplifier generates an output signal by performing a measurement amplifying function for the inputted signal. The second instrument amplifier has a positive input terminal(122) and a negative input terminal(124). The third instrument amplifier has a positive input terminal(132) and a negative input terminal(134).

Abstract translation: 目的：提供一种增加共模抑制比的装置及其方法，以通过使用三个仪表放大器来提高共模抑制比。 构成：测量放大装置包括第一仪器放大器（110），第二仪器放大器（120）和第三仪器放大器（130）。 第一仪器放大器具有正输入端（112）和负输入端（114）。 信号通过正输入端子和负输入端子输入到第一仪器放大器。 第一仪器放大器通过执行输入信号的测量放大功能来产生输出信号。 第二仪器放大器具有正输入端（122）和负输入端（124）。 第三仪器放大器具有正输入端（132）和负输入端（134）。

公开(公告)号：KR1020120088350A

公开(公告)日：2012-08-08

申请号：KR1020110009641

申请日：2011-01-31

Applicant: 한국전자통신연구원 ,  인하대학교 산학협력단

Inventor： 박장현 ,  최성훈 ,  김창선 ,  정신철 ,  송병철

IPC: G06T5/00

CPC classification number: G06T3/4053 ,  G06K9/6223 ,  G06K9/6255 ,  G06T3/4084

Abstract: PURPOSE: A device for generating an image with high resolution is provided to generate an image of higher resolution than the resolution of an input image by reducing a dictionary using a K-means clustering algorithm. CONSTITUTION: An image combining unit(230) searches an input low patch extracted from an input image, a low patch whose difference value from a reference value is small, and a high patch paired with the low patch from a first dictionary. The image combining unit searches a residual patch related to the searched high patch from a second dictionary. The image combining unit adds the searched high patch to the searched residual patch. The image combining unit generates an image whose resolution is higher than the resolution of the input image.

Abstract translation: 目的：提供用于生成高分辨率图像的装置，以通过使用K均值聚类算法减少字典来生成比输入图像的分辨率更高分辨率的图像。 构成：图像合成单元（230）搜索从输入图像提取的输入低补丁，与参考值的差值小的低补丁以及与第一字典的低补丁配对的高补丁。 图像组合单元从第二字典搜索与所搜索的高补丁相关的残差补丁。 图像组合单元将搜索到的高补丁添加到所搜索的残差补丁中。 图像合成单元生成分辨率高于输入图像的分辨率的图像。

公开(公告)号：KR1020120055769A

公开(公告)日：2012-06-01

申请号：KR1020100116804

申请日：2010-11-23

Applicant: 한국전자통신연구원 ,  한국과학기술원

Inventor： 김창선 ,  최성훈 ,  박장현 ,  이상국 ,  김주명 ,  김선아

IPC: H03K3/0231 ,  H03F3/45

CPC classification number: H03K3/0322 ,  H03F3/45475 ,  H03K5/1252 ,  H03K5/133 ,  H03K2005/00208

Abstract: PURPOSE: A voltage controlled oscillator and a method for eliminating phase noise are provided to eliminate phase noise by blocking currents flowing into a variable frequency transistor in a voltage level conversion section. CONSTITUTION: A voltage controlled oscillator(10) comprises a first delay cell(110), a second delay cell(120), a third delay cell(130), and a fourth delay cell(140) consisting of a plurality of stages. The voltage controlled oscillator is composed of four stages. A first stage includes the first delay cell. A second stage includes the second delay cell. A third stage includes the third delay cell. A fourth stage includes the fourth delay cell. The first delay cell to the fourth delay cell can be formed into a ring shape.

Abstract translation: 目的：提供压控振荡器和消除相位噪声的方法，以通过阻断流入电压电平转换部分中的可变频率晶体管的电流来消除相位噪声。 构成：压控振荡器（10）包括第一延迟单元（110），第二延迟单元（120），第三延迟单元（130）和由多个级组成的第四延迟单元（140）。 压控振荡器由四个阶段组成。 第一级包括第一延迟单元。 第二级包括第二延迟单元。 第三级包括第三延迟单元。 第四级包括第四延迟单元。 到第四延迟单元的第一延迟单元可以形成为环形。

公开(公告)号：KR1020110112625A

公开(公告)日：2011-10-13

申请号：KR1020100031838

申请日：2010-04-07

Applicant: 한국전자통신연구원 ,  한양대학교 에리카산학협력단

Inventor： 김창선 ,  박장현 ,  최성훈 ,  송영두 ,  신승훈 ,  어영선

IPC: H02M3/07

CPC classification number: H02M3/073 ,  H02M2003/077

Abstract: 본 발명은 구동전압에 따라 펌핑량을 조절하여 파워손실을 감소시켜 전하 펌핑 효율을 증대시켜 줄 수 있도록 하는 전하 펌핑 회로에 관한 것으로, 상기 전하 펌핑 회로는 전하 펌핑 회로에 구동전압을 센싱하여 전하 펌핑량을 결정하는 하나 이상의 센싱 신호를 발생하는 구동전압 센싱부; 상기 하나 이상의 센싱 신호의 신호값에 상응하는 진폭을 가지는 클럭 신호쌍을 발생하는 멀티 레벨 클럭 발생부; 및 상기 클럭 신호쌍을 충전하여 충전 전압을 발생하고, 상기 충전 전압을 상기 구동전압에 더하여 출력하는 전하 펌핑부를 포함할 수 있다.

公开(公告)号：KR100968808B1

公开(公告)日：2010-07-08

申请号：KR1020080066007

申请日：2008-07-08

Applicant: 한국전자통신연구원 ,  주식회사 씬멀티미디어

Inventor： 김창선 ,  차진종 ,  최성훈 ,  김무성 ,  윤형근 ,  강해용

IPC: H04N19/91 ,  H04N19/42

Abstract: 본 발명에 따른 가변길이부호 디코딩 시스템의 디코딩 방법은, 픽쳐 그룹으로부터 프레임을 추출하는 단계, 추출된 프레임을 디코딩하는데 필요한 테이블 정보를 에스램에 로딩하는 단계, 및 상기 로딩된 테이블 정보를 이용하여 상기 추출된 프레임을 디코딩하는 단계를 포함한다.
프레임,가변길이부호,에스램

公开(公告)号：KR1020100068746A

公开(公告)日：2010-06-24

申请号：KR1020080127206

申请日：2008-12-15

Applicant: 한국전자통신연구원 ,  한양대학교 산학협력단

Inventor： 이동석 ,  노정진 ,  윤병진 ,  최성훈 ,  김창선

IPC: H03K4/12 ,  H03K4/08

CPC classification number: H03K4/502 ,  H03K5/1252

Abstract: PURPOSE: A wave generating circuit is provided to reduce manufacturing costs by reducing the size of product and the complexity of a circuit which has saw tooth waves with various slopes. CONSTITUTION: A power generator(301) generates an input voltage in order to vary the slope of a saw tooth wave according to a voltage. A controller(302) controls a power generator. A source, a gate, and a drain of a first transistor(M6) are connected to a constant voltage, the gate of a second transistor(M5), and a constant current. The source and the drain of the second transistor are connected to the constant voltage and the source of the third transistor(M4), respectively. The source and the gate of the third transistor are connected to the drain of the second transistor and the power generator, respectively. The source and the gate of a fourth transistor(M3) are connected to the source of the third transistor and the gate of a fifth transistor(M2), respectively. The source and the gate of the fifth transistor are connected to the source of the third transistor and the gate of the fourth transistor, respectively. The drain and the gate of the sixth transistor(M1) are connected to the drain of the fifth transistor and a clock generator, respectively.

Abstract translation: 目的：提供一种波形发生电路，通过减小产品尺寸和锯齿锯齿形各种斜坡的电路的复杂性来降低制造成本。 构成：发电机（301）产生输入电压，以便根据电压改变锯齿波的斜率。 控制器（302）控制发电机。 第一晶体管（M6）的源极，栅极和漏极连接到恒定电压，第二晶体管（M5）的栅极和恒定电流。 第二晶体管的源极和漏极分别连接到恒定电压和第三晶体管（M4）的源极。 第三晶体管的源极和栅极分别连接到第二晶体管和发电机的漏极。 第四晶体管（M3）的源极和栅极分别连接到第三晶体管的源极和第五晶体管（M2）的栅极。 第五晶体管的源极和栅极分别连接到第三晶体管的源极和第四晶体管的栅极。 第六晶体管（M1）的漏极和栅极分别连接到第五晶体管的漏极和时钟发生器。

公开(公告)号：KR1020100056634A

公开(公告)日：2010-05-28

申请号：KR1020080115524

申请日：2008-11-20

Applicant: 한국전자통신연구원

Inventor： 김창선 ,  최성훈 ,  손진우 ,  오상근 ,  최두원 ,  김성화 ,  이성수 ,  양현철 ,  노예철

IPC: H04N7/18 ,  H04N5/225

CPC classification number: H04N7/18 ,  H03M1/12 ,  H04N5/235 ,  H04N7/014

Abstract: PURPOSE: An image sensing method of an image tracking chip is provided to contain an image tracking solution inside a chip by drastically reducing an image frame memory size through a sub-sampling and a timing sharing method. CONSTITUTION: Image data converted into a digital signal is inputted(S110). After luminance data is 1/2 sampled among the inputted video data, the sampled luminance data is stored(S120). A color sense among the inputted video data is outputted. While color sense data is outputted, the stored luminance data and presently inputted luminance data are compared(S130). A motion vector is outputted by calculating movement of an object(S140).

Abstract translation: 目的：提供一种图像跟踪芯片的图像感测方法，通过采用子采样和定时共享方法大大降低图像帧存储器大小，从而在芯片内部包含图像跟踪解决方案。 构成：转换为数字信号的图像数据被输入（S110）。 在输入的视频数据中对亮度数据进行1/2采样之后，存储采样的亮度数据（S120）。 输出输入的视频数据之间的色感。 当输出色觉数据时，比较存储的亮度数据和当前输入的亮度数据（S130）。 通过计算物体的移动来输出运动矢量（S140）。

公开(公告)号：KR1020080058135A

公开(公告)日：2008-06-25

申请号：KR1020070047275

申请日：2007-05-15

Applicant: 한국전자통신연구원 ,  서울시립대학교 산학협력단

Inventor： 박장현 ,  김기철 ,  이정우 ,  김창선

IPC: G06T1/00

CPC classification number: G06T1/20 ,  G06T15/405 ,  G06T2200/04 ,  G06T2207/10028

Abstract: A method for creating a pixel block and a buffering apparatus and method using the same are provided to create data blocks by unit to create block information, and determine whether to transmit pixel data using the created block information, thereby reducing the amount of data transmission and performing buffering without unnecessary operation. A method for creating a pixel block comprises the following steps of: storing the number of pixels included into a block and the shape information of the block(701); creating pixel blocks based on the reference information(702); generating block information about the block and transmitting the generated block information to a z-buffering apparatus(703); checking whether the z-buffering apparatus requests the transmission stoppage of pixel depth values(704); transmitting the pixel depth values of the block in order if the transmission stoppage of the pixel depth values is not requested(705); and closing the pixel block generation if there is a residual block(706); and selecting a next block if there is the residual block(707).

Abstract translation: 提供了一种用于创建像素块的方法和使用其的缓冲装置和方法，以便单元创建数据块以创建块信息，并且使用所创建的块信息来确定是否发送像素数据，从而减少数据传输量，并且 执行缓冲而不需要不必要的操作。 一种用于创建像素块的方法包括以下步骤：存储包括在块中的像素数和块的形状信息（701）; 基于所述参考信息创建像素块（702）; 产生关于块的块信息并将生成的块信息发送到z缓冲装置（703）; 检查z缓冲装置是否请求像素深度值的传输停止（704）; 如果不请求像素深度值的传输停止，按顺序传输块的像素深度值（705）; 以及如果存在残余块，则关闭所述像素块生成（706）; 以及如果存在剩余块，则选择下一个块（707）。