公开(公告)号：HK70984A

公开(公告)日：1984-09-21

申请号：HK70984

申请日：1984-09-13

Applicant: IBM

Inventor： DIXON JERRY DUANE

IPC: G11B15/087 ,  G06F3/06 ,  G11B20/12 ,  G11B20/14 ,  G11B27/10 ,  G06F1/04

Abstract: Signals generated by double frequency magnetic recording are received by logic which is controlled, and sensed, by a sequence of program instructions from a microprocessor. In particular, a special pattern of signals is to be recognized. The special pattern of signals is known in the magnetic disc recording art as an address mark which is a unique pattern of interspersed clock signals and data signals. The pattern is made more unique from any other pattern of data by the fact that certain of the clock signals are missing. The ability to utilize a microprocessor, which is relatively slow, in a magnetic recording system in which the bit rate is relatively fast, is enhanced by a particular processor program instruction which is effective to access a next following instruction from program storage and then stop the clock of the processor. The clock is re-started, and therefore execution of the next instruction initiated, upon receipt of a timing signal from the logic receiving the signals to be detected.

公开(公告)号：DE2965985D1

公开(公告)日：1983-09-01

申请号：DE2965985

申请日：1979-06-01

Applicant: IBM

Inventor： DIXON JERRY DUANE ,  LEININGER JOEL CALVIN

IPC: G06F12/06 ,  G06F9/32 ,  G06F9/34 ,  G06F9/355 ,  G06F9/40 ,  G06F12/02 ,  G06F9/36 ,  G06F13/00 ,  G11C8/00

Abstract: In a data processing system, a mechanism provides independent assignment of page locations for a program's instructions and its data and better enables control to be transferred between programs, or portions thereof, that reside at different addresses in different pages of a multiple page instruction store. The initial linkage is established through the use of a Branch And Link instruction. Subsequent linkages are established through the use of Return and Link instructions, each of which transfers control to a previous program, or program segment, while simultaneously establishing the linkage for a subsequent return to this program or program segment.

公开(公告)号：DE2854400A1

公开(公告)日：1979-07-05

申请号：DE2854400

申请日：1978-12-16

Applicant: IBM

Inventor： DIXON JERRY DUANE

IPC: G06F9/46 ,  G06F9/40 ,  G06F9/42 ,  G06F9/18

公开(公告)号：HK71496A

公开(公告)日：1996-05-03

申请号：HK71496

申请日：1996-04-25

Applicant: IBM

Inventor： DIXON JERRY DUANE ,  KEENER DON STEVEN ,  LOCKER HOWARD JEFFREY ,  MARAZAS GERALD ALLAN ,  MCNEILL ANDREW BOYCE ,  NEWSOM THOMAS HAROLD ,  OSBORN NEAL ALLEN

IPC: G06F12/06 ,  G06F13/14

Abstract: Apparatus for assigning addresses to devices connected to an SCSI bus (10). A second configure bus (15) interconnects address assignable devices on the SCSI bus. The assignable devices may be used in a mixed system where some devices have fixed non-assignable addresses. The master device in the SCSI bus transmits configuration commands over the configuration bus and addresses for assignment over the SCSI bus. Acknowledgements are received back from a device which has accepted an address. Once configured with an address, the device propagates subsequent configuration commands to an adjacent device.

公开(公告)号：NZ234712A

公开(公告)日：1993-04-28

申请号：NZ23471290

申请日：1990-07-30

Applicant: IBM

Inventor： BEALKOWSKI RICHARD ,  BLACKLEDGE JOHN WILEY ,  CRONK DOYLE STANFILL ,  DAYAN RICHARD ALAN ,  KINNEAR SCOTT GERARD ,  KOVACH GEORGE D ,  PALKA MATTHEW STEPHEN ,  SACHSENMAIER ROBERT ,  ZYVOLOSKI KEVIN MARSHALL ,  DIXON JERRY DUANE ,  MCNEILL ANDREW BOYCE ,  WACHTEL EDWARD IRVING

IPC: G06F9/445 ,  G06F12/14 ,  G06F13/10 ,  G06F21/22

Abstract: An apparatus and method for protecting BIOS stored on a direct access storage device (62) into a personal computer system (10). The personal computer system (JO) comprises a system processor (26), a system planar (24), a random access main memory (32), a read only memory (36), a protection means and at least one direct access storage device (62). The read only memory (36) includes a first portion of BIOS and data representing the type of system processor (26) and system planar (24) I/O configuration. The first portion of BIOS initializes the system (10) and the direct access storage device (62), and resets the protection means in order to read in a master boot record into the random access memory (32) from a protectable partition on the direct access storage device (62). The master boot record includes a data segment and an executable code segment. The data segment includes data representing system hardware and a system configuration which is supported by the master boot record. The first BIOS portion confirms the master boot record is compatible with the system hardware by verifying that the data from the data segment of the master boot record agrees with the system processor (26), system planar (24), and planar (24) I/O configuration. If the master boot record is compatible with the system hardware, the first BIOS portion vectors the system processor (26) to execute the executable code segment of the master boot record. The executable code segment confirms that the system configuration has not changed and loads in the remaining BIOS portion from the same protectable partition on the direct access storage device (62) into random access memory (32). The executable code segment then verifies the authenticity of the remaining BIOS portion and vectors the system processor (26) to begin executing the BIOS now in random access memory. BIOS, executing in random access memory (32), then activates the protection means to prevent further access to the protectable partition. BIOS boots up the operating system to begin operation of the personal computer system.

公开(公告)号：HK65492A

公开(公告)日：1992-09-11

申请号：HK65492

申请日：1992-09-03

Applicant: IBM

Inventor： DIXON JERRY DUANE ,  SOTOMAYOR GUY GIL JR

IPC: G06F3/06 ,  G06F12/08 ,  G06F12/0866 ,  G06F12/16 ,  G11B20/18 ,  G06F11/00

Abstract: In a DASD caching system, in which pages of sectors of data are stored by reading in a desired sector and prefetching a plurality of adjacent sectors for later access, errors in disk storage media cause error signals to be generated. Such errors are handled by storing indications of which sectors have errors and which do not, and accessing such indications in response to later requests for such sectors. Such indications are stored in each page in the cache. Further, a history is maintained of which pages and sectors therein, were placed in the cache in the past.

公开(公告)号：DE3072189D1

公开(公告)日：1991-03-14

申请号：DE3072189

申请日：1980-11-18

Applicant: IBM

Inventor： DIXON JERRY DUANE ,  FARRELL HENRY ,  KOPERDA RICHARD

IPC: G06F3/06 ,  G06F3/00 ,  G06F5/06 ,  G06F13/38

公开(公告)号：GB2202976A

公开(公告)日：1988-10-05

申请号：GB8728923

申请日：1987-12-10

Applicant: IBM

Inventor： DIXON JERRY DUANE ,  SOTOMAYOR JR GUY GIL

IPC: G06F3/06 ,  G06F12/08 ,  G06F12/0866 ,  G06F12/16 ,  G11B20/18 ,  G06F11/00

Abstract: In a DASD caching system, in which pages of sectors of data are stored by reading in a desired sector and prefetching a plurality of adjacent sectors for later access, errors in disk storage media cause error signals to be generated. Such errors are handled by storing indications of which sectors have errors and which do not, and accessing such indications in response to later requests for such sectors. Such indications are stored in each page in the cache. Further, a history is maintained of which pages and sectors therein, were placed in the cache in the past.

公开(公告)号：CH635451A5

公开(公告)日：1983-03-31

申请号：CH1290978

申请日：1978-12-19

Applicant: IBM

Inventor： DIXON JERRY DUANE

IPC: G06F9/46 ,  G06F9/40 ,  G06F9/42 ,  G06F9/06

公开(公告)号：DE2961862D1

公开(公告)日：1982-03-04

申请号：DE2961862

申请日：1979-05-10

Applicant: IBM

Inventor： BROWN LEWIS WRIGHT ,  CHISHOLM DOUGLAS RODERICK ,  DIXON JERRY DUANE

IPC: G06F13/12 ,  G06F13/32 ,  G06F3/04 ,  H04L11/00